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Enclosure-to-board interface with tamper-detect circuit(s)

  • US 10,306,753 B1
  • Filed: 02/22/2018
  • Issued: 05/28/2019
  • Est. Priority Date: 02/22/2018
  • Status: Active Grant
First Claim
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1. A tamper-respondent assembly comprising:

  • a circuit board;

    an enclosure mounted to the circuit board along an enclosure-to-board interface, the enclosure facilitating enclosing at least one electronic component coupled to the circuit board within a secure volume;

    a tamper-respondent electronic circuit structure facilitating defining the secure volume, the tamper-respondent electronic circuit structure comprising one or more tamper-detect circuits defined, at least in part, by at least one conductive trace disposed, at least in part, within the enclosure-to-board interface, the at least one conductive trace comprising stress rise regions to facilitate detecting a tamper event at the enclosure-to-board interface;

    an adhesive securing the enclosure to the circuit board, the adhesive contacting, at least in part, the at least one conductive trace of the one or more tamper-detect circuits within the enclosure-to-board interface, including at the stress rise regions of the at least one conductive trace;

    a solder mask, the solder mask partially covering the at least one conductive trace, and defining unexposed regions of the at least one conductive trace within the enclosure-to-board interface; and

    wherein the at least one conductive trace comprises the unexposed regions and exposed regions within the enclosure-to-board interface, the at least one conductive trace being exposed to the adhesive in the exposed regions and unexposed to the adhesive in the unexposed regions to facilitate defining the stress rise regions.

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