Semiconductor device

• US 10,312,320 B2
• Filed: 01/23/2018
• Issued: 06/04/2019
• Est. Priority Date: 08/20/2012
• Status: Active Grant

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: Nakano, Yuki, Nakamura, Ryota, Sakairi, Hiroyuki
• Primary Examiner(s): Ghyka, Alexander G
• Application Number:
  US15/878,038
• Publication Number:
  US 20180175139A1
• Time in Patent Office: 497 Days
• Field of Search: None
• CPC Class Codes: H01L 21/046 using ion implantation
• CPC Class Codes: H01L 29/063 Reduced surface field [RESURF] pn-junction structures
• CPC Class Codes: H01L 29/0649 Dielectric regions, e.g. SiO2 regions, air gaps
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/47 Schottky barrier electrodes H01L29/435 takes precedence
• CPC Class Codes: H01L 29/4916 the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/66068 the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
• CPC Class Codes: H01L 29/7805 in antiparallel, e.g. freewheel diode
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

The semiconductor device includes: a semiconductor layer in which a trench is formed having a side surface and a bottom surface; a second conductivity-type layer formed on the semiconductor layer on the side surface and the bottom surface of the trench; a first conductivity-type layer formed on the semiconductor layer so as to contact the second conductivity-type layer; a first electrode electrically connected to the first conductivity-type layer; a second electrode embedded in the trench and electrically connected to the second conductivity-type layer; and a barrier-forming layer which is arranged between the second electrode and the side surface of the trench and which, between said barrier-forming layer and the second conductivity-type layer, forms a potential barrier higher than the potential barrier between the second conductivity-type layer and the second electrode.

Claims

1. A semiconductor device comprising:

a semiconductor layer in which a gate trench having a side surface and a bottom surface and a source trench having a side surface and a bottom surface are formed;

a first conductivity type source layer that is disposed so as to be exposed on a surface of the semiconductor layer and that defines the side surface of the gate trench and the side surface of the source trench;

a second conductivity type channel layer that is disposed so as to be contiguous to the source layer on a back surface side of the semiconductor layer with respect to the source layer and that defines a part of the side surface of the gate trench and a part of the side surface of the source trench;

a first conductivity type drain layer that is disposed so as to be contiguous to the channel layer on the back surface side of the semiconductor layer with respect to the channel layer and that defines the bottom surface of the gate trench and the bottom surface of the source trench;

a gate electrode that is embedded in the gate trench;

a gate insulating film disposed between the side and bottom surfaces of the gate trench and the gate electrode;

a source electrode that is embedded in the source trench and that is electrically connected to the source layer; and

a hetero junction diode formed at a joint surface between the source electrode and the drain layer.

2. The semiconductor device according to claim 1, wherein the source trench has a depth deeper than that of the gate trench.

3. The semiconductor device according to claim 1, wherein the gate electrode is made of polysilicon.

4. The semiconductor device according to claim 1, further comprising a second conductivity type source breakdown voltage holding layer that is formed so as to be continuous with the channel layer and that is disposed on the side surface and the bottom surface of the source trench.

5. The semiconductor device according to claim 1, further comprising an insulating layer disposed on the side surface of the source trench and an edge portion of the bottom surface of the source trench.

6. The semiconductor device according to claim 1, further comprising a drain electrode electrically connected to the drain layer.

7. The semiconductor device according to claim 5, wherein the source electrode has a polysilicon layer at least on the insulating layer.

8. The semiconductor device according to claim 4, wherein the source electrode is electrically connected to the source breakdown voltage holding layer.

9. The semiconductor device according to claim 1, wherein the hetero junction diode has a junction barrier smaller than a diffusion potential of a body diode formed by pn junction between the channel layer and the drain layer.

10. The semiconductor device according to claim 9, wherein the junction barrier of the hetero junction diode is 1 eV to 1.5 eV, and

the diffusion potential of the body diode is 2.8 eV to 3.2 eV.

11. The semiconductor device according to claim 5, wherein the insulating layer is disposed such that the source layer is exposed from the side surface of the source trench.

12. The semiconductor device according to claim 7, wherein the polysilicon layer is embedded in a region inside the insulating layer in the source trench, and

the source electrode includes a metal layer stacked on the polysilicon layer embedded in the region.

13. The semiconductor device according to claim 1, wherein the semiconductor layer is made of SiC.

14. The semiconductor device according to claim 5, wherein the insulating layer is made of any one of non-doped polysilicon, silicon oxide (SiO₂), aluminum oxide (Al₂O₃), and aluminum oxynitride (AlON).

15. The semiconductor device according to claim 5, wherein the side surface of the source trench is covered with the insulating layer in a region ranging from the bottom surface of the source trench to an opening end of the source trench in a depth direction.

16. The semiconductor device according to claim 5, wherein the insulating layer selectively covers a part below the channel layer of the side surface of the source trench such that the source layer and the channel layer are exposed to the side surface of the source trench.