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Bulk nanosheet with dielectric isolation

  • US 10,312,323 B2
  • Filed: 07/17/2017
  • Issued: 06/04/2019
  • Est. Priority Date: 10/21/2015
  • Status: Active Grant
First Claim
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1. A nanowire field effect transistor (FET) device, comprising:

  • a bulk semiconductor wafer comprising a dielectric isolation region in a top portion thereof, wherein the dielectric isolation region comprises a thermal oxide;

    nanowire stacks on the bulk semiconductor wafer, wherein each of the nanowire stacks comprises alternating layers of a sacrificial material and a channel material, wherein portions of the channel material are released from the nanowire stacks in a channel region of the FET device and comprise nanowire channels of the FET device, and wherein a first layer in the nanowire stacks comprises the sacrificial material and is present on the bulk semiconductor wafer; and

    a gate surrounding the nanowire channels in the channel region of the device, wherein the first layer in the nanowire stacks has an inverted triangular shape beneath the gate in the channel region of the device.

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