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Scan system interface (SSI) module

  • US 10,317,463 B2
  • Filed: 10/27/2016
  • Issued: 06/11/2019
  • Est. Priority Date: 10/27/2015
  • Status: Active Grant
First Claim
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1. A computer system comprising:

  • a processor; and

    memory coupled to said processor and having stored therein instructions that, if executed by said computer system, cause said computer system to execute a method for testing comprising;

    sending an instruction to a joint test action group (JTAG) controller to select a first internal test data register of a plurality of data registers; and

    programming said first internal test data register to configure mode control access and state control access for a test controller implementing a sequential scan architecture at a system level, wherein said programming said first internal test data register comprises;

    programming a mode/state control bit to a second value in said first internal test data register to indicate a state control access during a state write phase;

    receiving state control signals received over a JTAG scan-in interface during said state control access, and storing said state control signals in a plurality of dynamic state control registers;

    receiving input data over a JTAG scan-in interface and storing said input data in a corresponding register decoded from mode values programmed in a previous mode access, wherein storing of said input data is controlled by said state control signals.

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