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Semiconductor device

  • US 10,319,427 B2
  • Filed: 10/26/2017
  • Issued: 06/11/2019
  • Est. Priority Date: 06/09/2017
  • Status: Active Grant
First Claim
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1. A semiconductor device comprising:

  • a memory cell region including memory cells arranged along channel holes, the channel holes being provided on a substrate to extend in a direction perpendicular to an upper surface of the substrate; and

    a peripheral circuit region disposed outside of the memory cell region, and including low voltage transistors and high voltage transistors,wherein the low voltage transistors include first transistors including a first gate dielectric layer and a first gate electrode layer including a metal, and the high voltage transistors include second transistors including a second gate dielectric layer having a dielectric constant lower than a dielectric constant of the first gate dielectric layer, and a second gate electrode layer including polysilicon, wherein the low voltage transistors have a channel length shorter than a channel length of the high voltage transistors.

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