Analog circuit and semiconductor device
First Claim
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1. A semiconductor device comprising:
- a first transistor;
a second transistor;
a light emitting element;
a first wiring; and
a second wiring,wherein one of a source and drain of the first transistor is electrically connected to the first wiring,wherein the other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor,wherein one of a source and drain of the second transistor is electrically connected to the light emitting element,wherein the other of the source and the drain of the second transistor is electrically connected to the second wiring,wherein each of the first transistor and the second transistor includes a gate, a first insulating layer over the gate, an oxide semiconductor over the first insulating layer, a second insulating layer over the oxide semiconductor, and the source and the drain over the second insulating layer,wherein the oxide semiconductor is an intrinsic or substantially intrinsic, andwherein in each of the first transistor and the second transistor, a drain current is 1×
10−
13 A or lower within a gate voltage range of −
5 V to −
20 V when the drain voltage is 1 V and 10 V.
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Abstract
An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.
240 Citations
2 Claims
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1. A semiconductor device comprising:
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a first transistor; a second transistor; a light emitting element; a first wiring; and a second wiring, wherein one of a source and drain of the first transistor is electrically connected to the first wiring, wherein the other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor, wherein one of a source and drain of the second transistor is electrically connected to the light emitting element, wherein the other of the source and the drain of the second transistor is electrically connected to the second wiring, wherein each of the first transistor and the second transistor includes a gate, a first insulating layer over the gate, an oxide semiconductor over the first insulating layer, a second insulating layer over the oxide semiconductor, and the source and the drain over the second insulating layer, wherein the oxide semiconductor is an intrinsic or substantially intrinsic, and wherein in each of the first transistor and the second transistor, a drain current is 1×
10−
13 A or lower within a gate voltage range of −
5 V to −
20 V when the drain voltage is 1 V and 10 V.
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2. A semiconductor device comprising:
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a first transistor; a second transistor; a light emitting element; a first wiring; and a second wiring, wherein one of a source and drain of the first transistor is electrically connected to the first wiring, wherein the other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor, wherein one of a source and drain of the second transistor is electrically connected to the light emitting element, wherein the other of the source and drain of the second transistor is electrically connected to the second wiring, wherein each of the first transistor and the second transistor includes a first gate, a first insulating layer over the first gate, an oxide semiconductor over the first insulating layer, the source and the drain over the oxide semiconductor, a second insulating layer over the source and the drain, and a second gate over the second insulating layer, wherein the oxide semiconductor is an intrinsic or substantially intrinsic, and wherein in each of the first transistor and the second transistor, a drain current is 1×
10−
13 A or lower within a gate voltage range of −
5 V to −
20 V when the drain voltage is 1 V and 10 V.
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Specification
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Current AssigneeSemiconductor Energy Laboratory Co., Ltd.
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Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
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InventorsYamazaki, Shunpei, Koyama, Jun, Hirose, Atsushi, Tsubuku, Masashi, Noda, Kosei
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Primary Examiner(s)Zweizig, Jeffery S
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Application NumberUS16/133,823Publication NumberTime in Patent Office266 DaysField of SearchNoneUS Class CurrentCPC Class CodesH01L 21/823412 with a particular manufactu...H01L 27/1225 with semiconductor material...H01L 27/124 with a particular compositi...H01L 27/1255 integrated with passive dev...H01L 27/156 two-dimensional arraysH01L 29/24 including, apart from dopin...H01L 29/36 characterised by the concen...H01L 29/7869 having a semiconductor body...H01L 29/78693 the semiconducting oxide be...H01L 2924/00 Indexing scheme for arrange...H01L 2924/0002 Not covered by any one of g...H01L 33/00 Semiconductor devices havin...H01L 33/025 Physical imperfections, e.g...H04M 1/0266 for a display module assemblyH04R 1/02 Casings; Cabinets ; Support...H10K 59/351 comprising more than three ...
