Methods, systems and apparatus for enabling an accessory for use with a host device

• US 10,324,507 B2
• Filed: 01/22/2016
• Issued: 06/18/2019
• Est. Priority Date: 05/09/2012
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Mullins, Scott, Kosut, Alexei, Terlizzi, Jeffrey J.
• Primary Examiner(s): Abbaszadeh, Jaweed A
• Assistant Examiner(s): Sampath, Gayathri
• Application Number:
  US15/004,740
• Publication Number:
  US 20160154446A1
• Time in Patent Office: 1,243 Days
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 1/266 Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: H02J 7/00034 Charger exchanging data with an electronic device, i.e. telephone, whose internal battery is under charge
• CPC Class Codes: H02J 7/00045 Authentication, i.e. circuits for checking compatibility between one component, e.g. a battery or a battery charger, and another component, e.g. a power source
• CPC Class Codes: H02J 7/00308 Overvoltage protection
• CPC Class Codes: H04M 1/72409 by interfacing with external accessories hands-free H04M1/60

Abstract

Methods, systems, and apparatus for enabling a power path between a power source and a host device via an accessory. A host device may send, to an accessory arranged within the power path, via a first data pin arranged in the host device, a request for an accessory identifier. The accessory identifier identifies the accessory. The host device may then determine whether the accessory identifier is received from the accessory within a specified period of time or whether a received accessory identifier is valid. If the accessory identifier is not received from the accessory within the specified period of time, or a received accessory identifier is not valid, the host device sends a new request for the accessory identifier to the accessory via a second data pin different than the first data pin.

Claims

1. A method of enabling a power path between a power source and a host device through an accessory device coupled between the power source and the host device, the accessory including a power pin and a data pin, the method comprising:

after a connection is established between the host device and the accessory, receiving a request comprising a first plurality of bits at the accessory device from the host device over the data pin for an accessory identifier that identifies a product type of the accessory;

determining, at the accessory device, that the request for the accessory identifier is valid, and if the received request for an accessory identifier is valid, sending a response comprising a second plurality of bits that communicates the accessory identifier from the accessory device to the host device over the data pin, and enabling, at the accessory device, a power path through the power pin between the power source and the host device that provides a first voltage level on the power pin; and

after the power path is enabled and while the host device and accessory device are connected, in response to receiving an instruction from the host device to after an impedance of the power path, altering, at the accessory device, the impedance of the power path thereby reducing the first voltage provided at the power pin to a second voltage level on the power pin that is less than the first voltage level.

2. The method of claim 1 wherein the instruction to alter an impedance of the power path comprises a third plurality of bits and is received from the host device over the data pin.

19. The method set forth in claim 1 wherein the second voltage level is approximately 0 Volts when at least a threshold amount of current is drawn through the power path.

3. An accessory device, comprising:

a power pin operable to provide power to a host device;

a data pin operable to receive an instruction from the host device; and

power limiting circuitry coupled to the power pin and the data pin operable to;

receive a request for an accessory identifier that identifies a product type of the accessory device and comprising a plurality of bits is received from the host device over the data pin;

determine that the request for the accessory identifier is valid;

send a response comprising a second plurality of bits that communicates the accessory identifier to the host device, and enable, at the accessory, a power path through the power pin between a power source and the host device that provides a first voltage level on the power pin; and

after the power path is enabled, in response to receiving an instruction from the host device to alter an impedance of the power path, alter, at the accessory, the impedance of the power path thereby reducing a voltage provided at the power pin to a second voltage level less than the first voltage level.

4. The accessory device of claim 3, wherein the instruction to alter the impedance of the power path comprises a third plurality of bits.

5. The accessory device of claim 4 wherein the data pin is further operable to receive power from the host device, and the power limiting circuitry includes a charge storage element operable to store power received from the host device via the data pin.

6. The accessory device of claim 5 wherein information is received at the data pin such that the data pin is maintained in a high voltage state for at least a specified amount of time for a given period, the high voltage state and amount of time being sufficient to maintain a charge in the charge storage element.

7. The accessory device of claim 4 wherein the power limiting circuitry includes impedance altering circuitry arranged between the power pin and the power source, and identification circuitry arranged between the data pin and the impedance altering circuitry.

8. The accessory device of claim 3, wherein the power source is part of the accessory device.

9. The accessory device of claim 3, wherein the power source is separate from the accessory device.

21. The accessory device set forth in claim 3 wherein the second voltage level is approximately 0 Volts when at least a threshold amount of current is drawn through the power path.

10. A method of enabling a power path between a power source and a host device through an accessory, the accessory including a connector having a power pin and a data pin, the method comprising:

determining, at the accessory, whether a request or an instruction comprising a plurality of bits is received from a host device over the data pin;

in response to receiving a request for an accessory identifier from the host device that identifies a product type of the accessory, sending a response comprising a plurality of bits that communicate the accessory identifier to the host device over the data pin and enabling, at the accessory, a power path between the power source and the host device through the power pin that provides a first voltage level on the power pin; and

in response to receiving an instruction from the host device to alter an impedance of the power path after the power path is enabled, altering, at the accessory, the impedance of the power path thereby reducing a voltage provided at the power pin to a second voltage level less than the first voltage level.

11. The method of claim 10 further comprising, prior to receiving the request for the accessory identifier:

determining whether power is received from the host device; and

when it is determined that power is received from the host device, disabling the power path between the power source and the host device.

12. The method of claim 10 further comprising:

determining whether the received request for the accessory identifier is valid; and

communicating the accessory identifier to the host device based on whether or not the received request for the accessory identifier is valid.

13. The method of any one of claim 10 further comprising after the power path is enabled, detecting a disconnect event and, if a disconnect event is detected, disabling the power path.

20. The method set forth in claim 10 wherein the second voltage level is approximately 0 Volts when at least a threshold amount of current is drawn through the power path.

14. An accessory, comprising:

a connector having a power pin operable to provide power to a host device and a data pin operable to receive an instruction from the host device; and

power limiting circuitry coupled to the power pin and the data pin and operable to;

monitor the data pin to determine whether a request or an instruction comprising a plurality of bits is received from the host device over the data pin; and

in response to receiving a request for an accessory identifier that identifies a product type of the accessory, send a response comprising a plurality of bits that communicates the accessory identifier to the host device over the data pin and enable a power path between a power source and the host device through the power pin that provides a first voltage level on the power pin; and

after the power path is enabled, in response to receiving an instruction from the host device to alter an impedance of the power path, alter, at the accessory, the impedance of the power path thereby reducing a voltage provided at the power pin to a second voltage level less than the first voltage level.

15. The accessory of claim 14 wherein the data pin is further operable to receive power from the host device, and the power limiting circuitry includes a charge storage element operable to store power received from the host device via the data pin.

16. The accessory of claim 15 wherein information is received at the data pin such that the data pin is maintained in a high voltage state for at least a specified amount of time for a given period, the high voltage state and amount of time being sufficient to maintain a charge in the charge storage element.

17. The accessory of claim 14 wherein the power limiting circuitry includes impedance altering circuitry and identification circuitry, the power limiting circuitry being arranged between the power pin and the power source, the identification circuitry being arranged between the data pin and the impedance altering circuitry, the identification circuitry being operable to enable the power path by instructing the impedance altering circuitry to reduce the impedance of the power path between the power source and the host device concurrently with communicating the accessory identifier to the host device.

18. The accessory of claim 14 wherein, the accessory further includes circuitry that detects a disconnect event and, if a disconnect event is detected, after the power path is enabled, disables the power path.

22. The accessory set forth in claim 14 wherein the second voltage level is approximately 0 Volts when at least a threshold amount of current is drawn through the power path.