Memory system
First Claim
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1. A memory system comprising:
- a memory configured to be written data therein, the memory being capable of changing a potential used for determination of the data in reading of the data;
a controller configured to read first data from the memory by making the memory use a first potential, execute error detection and correction of the first data read from the memory by using the first potential, read the first data from the memory by making the memory use a second potential, execute error detection and correction of the second data read from the memory by using the second potential differing from the first potential, and make the memory use a third potential in reading second data from the memory in a case where the error detection and correction of the first data read by using the third potential is successful, the third potential being the first potential or the second potential, whereinthe memory includes multiple block groups,each of the multiple block groups includes one or more blocks,each of the one or more blocks is a unit of erase, andthe controller stores information relating to the third potential for each of the multiple block groups.
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Abstract
According to one embodiment, a memory system includes a memory, and a processor. The memory converts an amount of charge held by a memory cell into a value. The processor executes a first process of reading first data from the memory. The processor executes a second process of reading the first data by making the memory use a first determination potential different in a case where error correction of the first data read through the first process is failed. The processor executes a third process of reading second data from the memory by making the memory use a third determination potential in a case where error correction of the first data read through the second process is succeeded. The third determination potential is the first determination potential used by the memory in a case where error correction of the first data read through the second process is succeeded.
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Citations
12 Claims
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1. A memory system comprising:
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a memory configured to be written data therein, the memory being capable of changing a potential used for determination of the data in reading of the data; a controller configured to read first data from the memory by making the memory use a first potential, execute error detection and correction of the first data read from the memory by using the first potential, read the first data from the memory by making the memory use a second potential, execute error detection and correction of the second data read from the memory by using the second potential differing from the first potential, and make the memory use a third potential in reading second data from the memory in a case where the error detection and correction of the first data read by using the third potential is successful, the third potential being the first potential or the second potential, wherein the memory includes multiple block groups, each of the multiple block groups includes one or more blocks, each of the one or more blocks is a unit of erase, and the controller stores information relating to the third potential for each of the multiple block groups. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method for reading data from a memory by making the memory use a potential, the memory including multiple block groups, each of the multiple block groups including one or more blocks, each of the one or more blocks being a unit of erase, the method comprising:
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reading first data from the memory by making the memory use a first potential; executing error detection and correction of the first data read from the memory by using the first potential; reading the first data from the memory by making the memory use a second potential differing from the first potential; executing error detection and correction of the second data read from the memory by using the second potential; and making the memory use a third potential in reading second data from the memory in a case where the error detection and correction of the first data read by using the third potential is successful, the third potential being the first potential or the second potential, wherein the method further comprising storing information relating to the third potential for each of the multiple block groups. - View Dependent Claims (8, 9, 10, 11, 12)
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Specification
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Current AssigneeKioxia Corporation
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Original AssigneeToshiba Memory Corporation (Kioxia Corporation)
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InventorsNakazumi, Shinichiro, Ueki, Katsuhiko, Kojima, Yoshihisa
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Primary Examiner(s)Torres, Joseph D
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Application NumberUS15/935,578Publication NumberTime in Patent Office449 DaysField of SearchUS Class CurrentCPC Class CodesG06F 11/1068 in sector programmable memo...G06F 11/1072 in multilevel memoriesG11C 11/5642 Sensing or reading circuits...G11C 16/0483 comprising cells having sev...G11C 16/26 Sensing or reading circuits...G11C 2029/0409 Online testG11C 29/021 in voltage or current gener...G11C 29/028 with adaption or trimming o...G11C 7/1063 Control signal output circu...
