Fingerprint sensor and button combinations and methods of making same

• US 10,325,132 B2
• Filed: 04/17/2017
• Issued: 06/18/2019
• Est. Priority Date: 10/14/2012
• Status: Active Grant

• Current Assignee: Synaptics Incorporated
• Original Assignee: Synaptics Incorporated
• Inventors: Dunlap, Brett, Wickboldt, Paul
• Primary Examiner(s): Miller, Daniel R
• Application Number:
  US15/489,561
• Publication Number:
  US 20170220837A1
• Time in Patent Office: 792 Days
• CPC Class Codes: G01N 27/221 by investigating the dielectric properties using microwaves G01N22/00; measuring loss factors or dielectric constants per se G01R27/26
• CPC Class Codes: G06F 1/1692 the I/O peripheral being a secondary touch screen used as control interface, e.g. virtual buttons or sliders
• CPC Class Codes: G06F 3/0445 using two or more layers of sensing electrodes, e.g. using two layers of electrodes separated by a dielectric layer
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
• CPC Class Codes: G06V 40/1306 non-optical, e.g. ultrasonic or capacitive sensing
• CPC Class Codes: G06V 40/1329 Protecting the fingerprint sensor against damage caused by the finger
• CPC Class Codes: H01L 21/4857 Multilayer substrates multilayer metallisation on monolayer substrate H01L21/4846
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H05K 1/0298 Multilayer circuits
• CPC Class Codes: H05K 1/036 Multilayers with layers of different types
• CPC Class Codes: H05K 1/112 directly combined with via connections
• CPC Class Codes: H05K 1/145 Arrangements wherein electric components are disposed between and simultaneously connected to two planar printed circuit boards, e.g. Cordwood modules
• CPC Class Codes: H05K 1/184 Components including terminals inserted in holes through the printed circuit board and connected to printed contacts on the walls of the holes or at the edges thereof or protruding over or into the holes
• CPC Class Codes: H05K 1/186 manufactured by mounting on or connecting to patterned circuits before or during embedding
• CPC Class Codes: H05K 2201/10151 Sensor

Abstract

It will be understood by those skilled in the art that there is disclosed in the present application a biometric sensor that may comprise a plurality of a first type of signal traces formed on a first surface of a first layer of a multi-layer laminate package; at least one trace of a second type, formed on a second surface of the first layer or on a first surface of a second layer of the multi-layer laminate package; and connection vias in at least the first layer electrically connecting the signal traces of the first type or the signal traces of the second type to respective circuitry of the respective first or second type contained in an integrated circuit physically and electrically connected to one of the first layer, the second layer or a third layer of the multi-layer laminate package.

Claims

1. A multi-layer biometric sensor package, comprising:

an upper circuit board layer, having a plurality of upper traces disposed at an upper surface of the upper circuit board layer and a plurality of lower traces disposed at a lower surface of the upper circuit board layer;

a core layer, disposed below the upper circuit board layer;

a lower circuit board layer, disposed below the core layer, having a plurality of upper traces disposed at an upper surface of the lower circuit board layer and a plurality of lower traces disposed at a lower surface of the lower circuit board layer;

and

an integrated circuit, disposed below the lower circuit board layer, wherein the plurality of upper traces of the upper circuit board layer and the plurality of lower traces of the upper circuit board layer are electrically connected to the integrated circuit through connection vias, wherein the connection vias include one or more connection vias traversing the core layer.

2. The multi-layer biometric sensor package according to claim 1, wherein the upper traces of the upper circuit board layer include transmitter electrodes, and wherein the lower traces of the upper circuit board layer include receiver electrodes.

3. The multi-layer biometric sensor package according to claim 2, wherein the transmitter and receiver electrodes are arranged as a two-dimensional grid array.

4. The multi-layer biometric sensor package according to claim 1, wherein the plurality of upper traces of the upper circuit board layer correspond to a first metal layer, the plurality of lower traces disposed at the lower surface of the upper circuit board layer correspond to a second metal layer, the plurality of upper traces of the lower circuit board layer correspond to a third metal layer, and the plurality of lower traces of the lower circuit board layer correspond to a fourth metal layer.

5. The multi-layer biometric sensor package according to claim 1, wherein the connection vias further include one or more connection vias traversing the lower circuit board layer.

6. The multi-layer biometric sensor package according to claim 1, wherein the integrated circuit is electrically connected to the lower circuit board layer via connective posts.

7. The multi-layer biometric sensor package according to claim 6, wherein the connective posts comprise copper and are surrounded in an underfill layer.

8. The multi-layer biometric sensor package according to claim 6, wherein the connective posts are connected to die connective pads of the integrated circuit.

9. The multi-layer biometric sensor package according to claim 1, wherein the integrated circuit is attached to the lower circuit board layer via an underfill layer.

10. The multi-layer biometric sensor package according to claim 1, wherein the lower circuit board layer is electrically connected to traces of a substrate via ball grid array (BGA) solder balls.

11. The multi-layer biometric sensor package according to claim 1, further comprising:

a lower solder mask layer, disposed below the lower circuit board layer.

12. The multi-layer biometric sensor package according to claim 1, further comprising encapsulation material at least partially surrounding the upper circuit board layer and the core layer.

13. The multi-layer biometric sensor package according to claim 12, further comprising a protective layer, wherein the encapsulation material comprises an opening to expose the protective layer so as to provide a top surface for the multi-layer biometric sensor package.

14. The multi-layer biometric sensor package according to claim 1, wherein the multi-layer biometric sensor package is disposed in an opening of a device housing.

15. The multi-layer biometric sensor package according to claim 1, wherein the multi-layer biometric sensor package is incorporated in a button of a mobile device.

16. The multi-layer biometric sensor package according to claim 1, further comprising:

an upper solder mask layer, disposed above the upper circuit board layer.

17. A method for producing a multi-layer biometric sensor package, comprising:

providing a core layer;

providing an upper circuit board layer above the core layer;

forming a plurality of upper traces of the upper circuit board layer disposed at an upper surface of the upper circuit board layer;

forming a plurality of lower traces of the upper circuit board layer disposed at a lower surface of the upper circuit board layer;

providing a lower circuit board layer below the core layer;

forming a plurality of upper traces of the lower circuit board layer disposed at an upper surface of the lower circuit board layer;

forming a plurality of lower traces of the lower circuit board layer disposed at a lower surface of the lower circuit board layer;

forming connection vias, wherein the connection vias include one or more connection vias traversing the core layer; and

providing an integrated circuit below the lower circuit board layer, wherein the plurality of upper traces of the upper circuit board layer and the plurality of lower traces of the upper circuit board layer are electrically connected to the integrated circuit through the one or more connection vias traversing the core layer.