Display device and manufacturing method thereof

• US 10,325,944 B2
• Filed: 12/13/2017
• Issued: 06/18/2019
• Est. Priority Date: 08/27/2015
• Status: Active Grant

• Current Assignee: TCL China Star Optoelectronics Technology Co. Ltd. (TCL Technology Group Corp.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Jeon, Young Jae, Park, Jae-Hyun, Lee, Sang Ju, Choi, Jae Ho, Hyeon, Hye Won
• Primary Examiner(s): Turner, Brian
• Application Number:
  US15/840,838
• Publication Number:
  US 20180108689A1
• Time in Patent Office: 552 Days
• CPC Class Codes: G02F 1/134363 for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: H01L 2029/42388 characterised by the shape of the insulating material
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1262 with a particular formation, treatment or coating of the substrate
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor

Abstract

The present inventive concept relates to a display device and a manufacturing method thereof. A display device according to an exemplary embodiment of the present inventive concept includes: a substrate; a first gate conductor provided on the substrate; and a gate insulator provided on the first gate conductors, wherein edges of the first gate conductor are recessed from edges of the first gate insulator, and the edges of the first gate insulator are respectively parallel with the edges of the first gate conductor.

Claims

1. A display device comprising:

a substrate;

a gate electrode disposed on the substrate;

a common electrode layer disposed on the substrate;

a gate insulator disposed on the gate electrode, the gate insulator not overlapping the common electrode layer in a first direction perpendicular to a surface of the substrate;

a first insulating layer disposed on the common electrode layer, the first insulating layer not overlapping the gate electrode in the first direction;

a semiconductor disposed on the gate insulator;

a source electrode and a drain electrode which are disposed on the semiconductor;

a second insulating layer disposed on the source electrode, the drain electrode and the first insulating layer; and

a pixel electrode disposed on the second insulating layer and overlapping the common electrode,

wherein any semiconductor is not disposed between the first insulating layer and the second insulating layer.

2. The display device of claim 1, wherein:

a total thickness of the gate electrode, the gate insulator, and the semiconductor is greater than a total thickness of the common electrode layer and the first insulating layer.

3. The display device of claim 1, wherein:

the gate electrode, the gate insulator, and the semiconductor are separated from an edge of the first insulating layer with a space therebetween.

4. The display device of claim 3, wherein:

at least one of the source electrode and the drain electrode includes a portion disposed in the space.

5. The display device of claim 4, wherein:

the source electrode and the drain electrode contact a lateral surface of the gate insulator and are separated from the gate electrode.

6. The display device of claim 4, wherein:

the source electrode and the drain electrode contact a lateral surface of the first insulating layer and are separated from the common electrode layer.

7. The display device of claim 4, wherein:

the portion of the at least one of the source electrode and the drain electrode contacts the substrate.

8. The display device of claim 1, wherein:

the first insulating layer does not overlap the gate insulator in the first direction.

9. The display device of claim 1, wherein:

the first insulating layer covers an outer area provided at a periphery of the common electrode layer.

10. The display device of claim 9, wherein:

an edge of the common electrode layer is separated from and substantially parallel with an edge of the first insulating layer in a plan view.

11. The display device of claim 1, wherein:

the gate insulator covers an outer area provided at a periphery of the gate electrode.

12. The display device of claim 11, wherein:

an edge of the gate electrode is separated from and substantially parallel with an edge of the gate insulator in a plan view.

13. The display device of claim 1, wherein:

an edge of the semiconductor is aligned with an edge of the gate insulator.

14. The display device of claim 1, wherein:

the common electrode layer contacts the substrate.

15. A display device comprising:

a substrate;

a gate electrode and a common electrode layer which are disposed on the substrate and separated from each other;

a gate insulator disposed on the gate electrode;

a first insulating layer disposed on the common electrode layer;

a semiconductor disposed on the gate insulator;

a source electrode and a drain electrode which are disposed on the semiconductor;

a second insulating layer disposed on the source electrode, the drain electrode and the first insulating layer,

wherein a first stacked structure of the gate electrode, the gate insulator, and the semiconductor is spaced apart from a second stacked structure of the common electrode layer and the first insulating layer with a space therebetween,

wherein any semiconductor is not disposed between the first insulating layer and the second insulating layer.

16. The display device of claim 15, wherein:

a thickness of the first stacked structure is greater than a thickness of the second stacked structure.

17. The display device of claim 15, wherein:

at least one of the source electrode and the drain electrode includes a portion disposed in the space.

18. The display device of claim 17, wherein:

the portion of the at least one of the source electrode and the drain electrode contacts the substrate.

19. The display device of claim 17, wherein:

the source electrode and the drain electrode contact a lateral surface of the gate insulator and are separated from the gate electrode.

20. The display device of claim 17, wherein:

the source electrode and the drain electrode contact a lateral surface of the first insulating layer and are separated from the common electrode layer.