Vertical transistor device structure with cylindrically-shaped field plates

• US 10,325,988 B2
• Filed: 12/13/2016
• Issued: 06/18/2019
• Est. Priority Date: 12/13/2013
• Status: Active Grant

• Current Assignee: Power Integrations Incorporated
• Original Assignee: Power Integrations Incorporated
• Inventors: Georgescu, Sorin Stefan, Varadarajan, Kamal Raj, Ankoudinov, Alexei
• Primary Examiner(s): Kraig, William F
• Assistant Examiner(s): Rahman, Khatib A
• Application Number:
  US15/376,949
• Publication Number:
  US 20180069087A1
• Time in Patent Office: 917 Days
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/105 with vertical doping variation H01L29/7827 takes precedence
• CPC Class Codes: H01L 29/401 Multistep manufacturing processes
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/404 Multiple field plate structures
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/42376 characterised by the length or the sectional shape
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/66712 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/8083 Vertical transistors SIT H01L29/7722
• CPC Class Codes: H01L 29/872 Schottky diodes

Abstract

A vertical power transistor device includes a semiconductor layer of a first conductivity type, with a plurality of dielectric regions disposed in the semiconductor layer. The dielectric regions extend in a vertical direction from a top surface of the semiconductor layer downward. Each dielectric region has a rounded-square cross-section in a horizontal plane perpendicular to the vertical direction. Adjacent ones of the dielectric regions are laterally separated by a narrow region of the semiconductor layer. Each dielectric region has a cylindrical field plate member centrally disposed therein. The cylindrical field plate member extends in the vertical direction from the top surface downward to near a bottom of the dielectric region. The dielectric region laterally separates the cylindrical field plate member from the narrow region. A source region is disposed at the top surface, and a drain region is disposed at the bottom, of the semiconductor layer.

Claims

1. A vertical power transistor device comprising:

a semiconductor layer of a first conductivity type;

a plurality of dielectric regions disposed in the semiconductor layer, each dielectric region having an outer side that extends in a vertical direction from a top surface of the semiconductor layer downward, each dielectric region having a rounded-square cross-section in a horizontal plane perpendicular to the vertical direction, adjacent ones of the dielectric regions being laterally separated by a narrow region of the semiconductor layer;

a cylindrical field plate member centrally disposed within each dielectric region, the cylindrical field plate member having a circular cross-section in the horizontal plane and comprising a conductive material that fully extends laterally across a diameter of the circular cross-section of the cylindrical field plate member, the conductive material, extending in the vertical direction from the top surface downward to near a bottom of the dielectric region, the dielectric region laterally separating the cylindrical field plate member from the narrow region;

a source region of the first conductivity type disposed at the top surface of the narrow region;

a body region of a second conductivity type, the body region separating the source from a lower portion of the narrow region, the lower portion comprising a drift region;

a drain region of the first conductivity type disposed beneath the semiconductor layer; and

an annular gate member disposed in each dielectric region between the narrow region and the cylindrical field plate member.

2. The vertical power transistor device according to claim 1 wherein the plurality of dielectric regions are arranged in an array of rows.

3. The vertical power transistor device according to claim 2 wherein adjacent rows in the array are offset from one another.

4. The vertical power transistor device according to claim 2 wherein adjacent rows in the array are offset from one another by 50% of a spacing distance between adjacent ones of the cylindrical field plate members in each row.

5. The vertical power transistor device according to claim 1 wherein the annular gate member is a trench gate member.

6. The vertical power transistor device according to claim 1 wherein each annular gate member has a rounded-square shape that conforms with the outer peripheral shape of each dielectric region such that the narrow region of the semiconductor layer is separated from annular gate member by a substantially constant lateral separation distance.

7. The vertical power transistor device according to claim 1 wherein the cylindrical field plate members each comprise polysilicon.

8. The vertical power transistor device according to claim 1 further comprising a substrate, the semiconductor layer comprising an epitaxial layer disposed on the substrate.

9. The vertical power transistor device according to claim 8 wherein the substrate is the first conductivity type.

10. The vertical power transistor device according to claim 8 wherein the substrate is a second conductivity type.

11. The vertical power transistor device according to claim 1 wherein the first conductivity type comprises n-type.

12. The vertical power transistor device according to claim 1 wherein each of the plurality of dielectric regions extends in the vertical direction downward into the drain region.

13. The vertical power transistor device according to claim 1 wherein the drift region has a doping concentration that varies from near the body region down to near a bottom of the drift region.

14. The vertical power transistor device according to claim 1 wherein the drift region comprises an epitaxial layer having a graded doping profile.

15. The vertical power transistor device according to claim 13 wherein the doping concentration is highest near the bottom of the drift region.

16. A high-voltage transistor comprising:

a substrate;

an array of dielectric regions disposed in the substrate and arranged in an array, each of the dielectric regions having an outer side that extends in a vertical direction from a top surface of the substrate downward, the dielectric regions having a rounded-square shaped cross-section in a horizontal plane perpendicular to the vertical direction, adjacent ones of the dielectric regions being laterally separated by a narrow region of the substrate;

a cylindrical field plate member centrally disposed within each dielectric region, the cylindrical field plate member having a circular cross-section in the horizontal plane and comprising a conductive material that fully extends laterally across a diameter of the circular cross-section of the cylindrical field plate member, the conductive material extending in the vertical direction from the top surface downward to near a bottom of the dielectric region, the dielectric region laterally separating the cylindrical field plate member from the narrow region;

a source disposed at the top surface of the narrow region;

a body region that separates the source from a lower portion of the narrow region, the lower portion comprising a drift region;

a drain disposed at the bottom of the substrate; and

an annular gate member disposed in each dielectric region between the narrow region and the cylindrical field plate member.

17. The high-voltage transistor according to claim 16 wherein the ring-shaped gate member is a trench gate member.

18. The high-voltage transistor according to claim 16 wherein the dielectric regions each comprise an oxide.

19. The high-voltage transistor according to claim 16 wherein the narrow region has a doping concentration in a range of about 1×

10¹⁵ /cm³ to about 1×

10¹⁷/cm³.

20. The high-voltage transistor according to claim 16 wherein each of the dielectric regions extends downward into the drain.