Managing fairness for lock and unlock operations using operation prioritization
First Claim
1. A processor comprising:
- a plurality of processor cores; and
instruction management circuitry configured to manage lock and unlock operations for a first thread executing on a first processor core of the plurality of processor cores, the managing including;
for each instruction included in the first thread and identified as being associated with a lock operation corresponding to a particular lock stored in a particular memory location, in response to determining that the particular lock has already been acquired, continuing to perform the lock operation for a plurality of attempts using associated operation messages for accessing the particular memory location, andfor each instruction included in the first thread and identified as being associated with an unlock operation corresponding to a particular lock stored in a particular memory location, releasing the particular lock from the first thread using an associated operation message for accessing the particular memory location;
wherein operation messages associated with a lock operation or unlock operation include (1) information identifying a particular memory location to which access is being requested and (2) information identifying whether a lock operation or an unlock operation is being requested, and operation messages are sent by threads executing on the plurality of processor cores to a data structure stored in a memory system of the processor;
wherein the processor is configured to prioritize selected operation messages associated with an unlock operation over operation messages associated with a lock operation based at least in part on at least one of (1) an order among different operation messages stored in the data structure, or (2) relative priorities associated with the operation messages stored in the data structure.
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Accused Products
Abstract
Managing lock and unlock operations for a first thread executing on a first processor core includes, for each instruction included in the first thread and identified as being associated with: (1) a lock operation corresponding to a particular lock stored in a particular memory location, in response to determining that the particular lock has already been acquired, continuing to perform the lock operation for multiple attempts using associated operation messages for accessing the particular memory location, or (2) an unlock operation corresponding to a particular lock stored in a particular memory location, releasing the particular lock from the first thread using an associated operation message for accessing the particular memory location. Selected operation messages associated with an unlock operation are prioritized over operation messages associated with a lock operation.
77 Citations
32 Claims
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1. A processor comprising:
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a plurality of processor cores; and instruction management circuitry configured to manage lock and unlock operations for a first thread executing on a first processor core of the plurality of processor cores, the managing including; for each instruction included in the first thread and identified as being associated with a lock operation corresponding to a particular lock stored in a particular memory location, in response to determining that the particular lock has already been acquired, continuing to perform the lock operation for a plurality of attempts using associated operation messages for accessing the particular memory location, and for each instruction included in the first thread and identified as being associated with an unlock operation corresponding to a particular lock stored in a particular memory location, releasing the particular lock from the first thread using an associated operation message for accessing the particular memory location; wherein operation messages associated with a lock operation or unlock operation include (1) information identifying a particular memory location to which access is being requested and (2) information identifying whether a lock operation or an unlock operation is being requested, and operation messages are sent by threads executing on the plurality of processor cores to a data structure stored in a memory system of the processor; wherein the processor is configured to prioritize selected operation messages associated with an unlock operation over operation messages associated with a lock operation based at least in part on at least one of (1) an order among different operation messages stored in the data structure, or (2) relative priorities associated with the operation messages stored in the data structure. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for managing instructions on a processor comprising a plurality of processor cores, the method comprising:
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managing lock and unlock operations for a first thread executing on a first processor core of the plurality of processor cores, the managing including; for each instruction included in the first thread and identified as being associated with a lock operation corresponding to a particular lock stored in a particular memory location, in response to determining that the particular lock has already been acquired, continuing to perform the lock operation for a plurality of attempts using associated operation messages for accessing the particular memory location, and for each instruction included in the first thread and identified as being associated with an unlock operation corresponding to a particular lock stored in a particular memory location, releasing the particular lock from the first thread using an associated operation message for accessing the particular memory location; wherein operation messages associated with a lock operation or unlock operation include (1) information identifying a particular memory location to which access is being requested and (2) information identifying whether a lock operation or an unlock operation is being requested, and operation messages are sent by threads executing on the plurality of processor cores to a data structure stored in a memory system of the processor; and prioritizing selected operation messages associated with an unlock operation over operation messages associated with a lock operation based at least in part on at least one of (1) an order among different operation messages stored in the data structure, or (2) relative priorities associated with the operation messages stored in the data structure. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A processor comprising:
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a plurality of processor cores; and instruction management circuitry configured to manage lock and unlock operations for a first thread executing on a first processor core of the plurality of processor cores, the managing including; for each instruction included in the first thread and identified as being associated with a lock operation corresponding to a particular lock stored in a particular memory location, in response to determining that the particular lock has already been acquired, continuing to perform the lock operation for a plurality of attempts using associated operation messages for accessing the particular memory location, and for each instruction included in the first thread and identified as being associated with an unlock operation corresponding to a particular lock stored in a particular memory location, releasing the particular lock from the first thread using an associated operation message for accessing the particular memory location; wherein the processor is configured to prioritize (1) selected operation messages associated with an unlock operation and (2) any messages associated with store instructions that are destined for a cache block that is being targeted by a pointer of the unlock operation over (3) operation messages associated with a lock operation. - View Dependent Claims (22, 23, 24, 25, 26)
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27. A method for managing instructions on a processor comprising a plurality of processor cores, the method comprising:
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managing lock and unlock operations for a first thread executing on a first processor core of the plurality of processor cores, the managing including; for each instruction included in the first thread and identified as being associated with a lock operation corresponding to a particular lock stored in a particular memory location, in response to determining that the particular lock has already been acquired, continuing to perform the lock operation for a plurality of attempts using associated operation messages for accessing the particular memory location, and for each instruction included in the first thread and identified as being associated with an unlock operation corresponding to a particular lock stored in a particular memory location, releasing the particular lock from the first thread using an associated operation message for accessing the particular memory location; and prioritizing (1) selected operation messages associated with an unlock operation and (2) any messages associated with store instructions that are destined for a cache block that is being targeted by a pointer of the unlock operation over (3) operation messages associated with a lock operation. - View Dependent Claims (28, 29, 30, 31, 32)
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Specification