Memory controller for strobe-based memory systems
First Claim
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1. An integrated circuit (IC) memory controller comprising:
- a strobe signal pin to receive a strobe signal;
a mask circuit having an input to receive a delayed version of the strobe signal, the mask circuit to generate a masked timing signal based on the delayed strobe signal; and
a sampler coupled to the mask circuit to sample read data based on the masked timing signal.
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Abstract
An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
88 Citations
20 Claims
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1. An integrated circuit (IC) memory controller comprising:
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a strobe signal pin to receive a strobe signal; a mask circuit having an input to receive a delayed version of the strobe signal, the mask circuit to generate a masked timing signal based on the delayed strobe signal; and a sampler coupled to the mask circuit to sample read data based on the masked timing signal. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method of operation in a memory controller, the method comprising:
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receiving a strobe signal; generating a masked timing signal based on a delayed version of the strobe signal; and sampling read data based on the masked timing signal. - View Dependent Claims (9, 10, 11, 12, 13)
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14. An integrated circuit (IC) chip comprising:
memory control circuitry including a strobe signal pin to receive a strobe signal; a mask circuit having an input to receive a delayed version of the strobe signal, the mask circuit to generate a masked timing signal based on the delayed strobe signal; and a sampler coupled to the mask circuit to sample read data based on the masked timing signal. - View Dependent Claims (15, 16, 17, 18, 19, 20)
Specification