Semiconductor package with integrated harmonic termination feature

• US 10,332,847 B2
• Filed: 06/01/2017
• Issued: 06/25/2019
• Est. Priority Date: 06/01/2017
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Liu, Yang, Zhang, Xikun, Agar, Bill
• Primary Examiner(s): Chang, Jay C
• Application Number:
  US15/610,805
• Publication Number:
  US 20180350758A1
• Time in Patent Office: 754 Days
• Field of Search: None
• CPC Class Codes: H01L 2223/6611 Wire connections
• CPC Class Codes: H01L 2223/6627 Waveguides, e.g. microstrip line, strip line, coplanar line
• CPC Class Codes: H01L 2223/6644 Packaging aspects of high-frequency amplifiers amplifiers per se H03F
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48101 Connecting bonding areas at the same height, e.g. horizontal bond
• CPC Class Codes: H01L 2224/48106 the connector being orthogonal to a side surface of the semiconductor or solid-state body, e.g. parallel layout
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48175 the item being metallic
• CPC Class Codes: H01L 2224/48195 the item being a discrete passive component
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 23/047 the other leads being parallel to the base
• CPC Class Codes: H01L 23/49562 for devices being provided for in H01L29/00
• CPC Class Codes: H01L 23/49575 Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 23/585 comprising conductive layers or plates or strips or rods or rings H01L23/60, H01L23/62, H01L23/64, H01L23/66 take precedence
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 25/072 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/13055 Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/13064 High Electron Mobility Transistor [HEMT, HFET [heterostructure FET], MODFET]
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/19032 : being a microstrip line type
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01P 3/081 : Microstriplines
• CPC Class Codes: H03F 2200/165 : A filter circuit coupled to the input of an amplifier
• CPC Class Codes: H03F 2200/222 : A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier
• CPC Class Codes: H03F 2200/387 : A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
• CPC Class Codes: H03F 2200/451 : the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 3/193 : with field-effect devices H03F3/195 takes precedence

Abstract

A semiconductor package includes a metal flange having a lower surface and an upper surface opposite the lower surface. An electrically insulating window frame is disposed on the upper surface of the flange. The electrically insulating window frame forms a ring around a periphery of the metal flange so as to expose the upper surface of the metal flange in a central die attach region. A first electrically conductive lead is disposed on the electrically insulating window frame and extends away from a first side of the metal flange. A second electrically conductive lead is disposed on the electrically insulating window frame and extends away from a second side of the metal flange, the second side being opposite the first side. A first harmonic filtering feature is formed on a portion of the electrically insulating window frame and is electrically connected to the first electrically conductive lead.

Claims

1. A semiconductor package, comprising:

a metal flange comprising a lower surface and an upper surface opposite the lower surface;

an electrically insulating window frame disposed on the upper surface of the flange, the electrically insulating window frame forming a ring around a periphery of the metal flange so as to expose the upper surface of the metal flange in a central die attach region;

a first electrically conductive lead being disposed on the electrically insulating window frame and extending away from a first side of the metal flange;

a second electrically conductive lead being disposed on the electrically insulating window frame and extending away from a second side of the metal flange, the second side being opposite the first side; and

a first harmonic filtering feature formed on a portion of the electrically insulating window frame and electrically connected to the first electrically conductive lead.

2. The semiconductor package of claim 1, wherein the first harmonic filtering feature is formed in a metallization layer that is disposed on the electrically insulating window frame and is continuously connected to the first electrically conductive lead.

3. The semiconductor package of claim 2, wherein the first harmonic filtering feature forms a first microstripline open stub.

4. The semiconductor package of claim 3, wherein the first microstripline open stub open stub comprises:

a first elongated span of microstripline that is continuously connected to the first electrically conductive lead and extends away from the first electrically conductive lead;

a second elongated span of microstripline that is continuously connected to the first elongated span of microstripline and extends away from the first elongated span of microstripline towards the first side of the metal flange; and

a third elongated span of microstripline that is continuously connected to the second elongated span of microstripline and extends away from the second elongated span of microstripline and towards the first electrically conductive lead.

5. The semiconductor package of claim 4, further comprising:

a third electrically conductive lead being disposed on the electrically insulating window frame and extending away from the first side of the metal flange, the third electrically conductive lead being spaced apart from and parallel to the first electrically conductive lead;

a fourth electrically conductive lead being disposed on the electrically insulating window frame and extending away from the second side of the metal flange, the fourth electrically conductive lead being spaced apart from and parallel to the second electrically conductive lead; and

a second harmonic filtering feature being formed on a portion of the electrically insulating window frame and electrically connected to the third electrically conductive lead.

6. The semiconductor package of claim 5, wherein the second harmonic filtering feature forms a second microstripline open stub, wherein the second microstripline open stub comprises:

a fourth elongated span of microstripline that is continuously connected to the third electrically conductive lead and extends away from the third electrically conductive lead; and

a fifth elongated span of microstripline that is continuously connected to the fourth elongated span of microstripline and extends away from the fourth elongated span of microstripline towards the second side of the metal flange.

7. The semiconductor package of claim 2, wherein the second harmonic filtering feature forms a radial stub.

8. A packaged amplifier, comprising:

a metal flange comprising a lower surface and an upper surface opposite the lower surface;

an electrically insulating window frame disposed on the upper surface of the flange, the electrically insulating window frame forming a ring around a periphery of the metal flange so as to expose the upper surface of the metal flange in a central die attach region;

a first electrically conductive RF (radio frequency) input lead extending away from a first side of the metal flange;

a first electrically conductive RF output lead extending away from a second side of the metal flange, the second side being opposite the first side;

a first RF transistor die being mounted on the metal flange in the central die attach region and being electrically connected to the first RF input lead and the first RF output lead, and

a first harmonic filtering feature formed on a portion of the electrically insulating window frame and electrically connected to the first RF input lead,

wherein the first RF transistor die is configured to operate at a first fundamental RF frequency, and

wherein the first harmonic filtering feature is configured to filter a higher order harmonic of the first fundamental RF frequency.

9. The packaged amplifier of claim 8, wherein the first harmonic filtering feature is formed in a metallization layer that is disposed on the electrically insulating window frame and is continuously connected to the first RF input lead.

10. The packaged amplifier of claim 9, wherein the first harmonic filtering feature forms a first microstripline open stub.

11. The packaged amplifier of claim 10, wherein the first microstripline open stub open stub comprises:

a first elongated span of microstripline that is continuously connected to the first RF input lead and extends away from the first RF input lead;

a second elongated span of microstripline that is continuously connected to the first elongated span of microstripline and extends away from the first elongated span of microstripline towards the first side of the metal flange; and

a third elongated span of microstripline that is continuously connected to the second elongated span of microstripline and extends away from the second elongated span of microstripline and towards the first electrically conductive lead.

12. The packaged amplifier of claim 11, wherein the first harmonic filtering feature is configured to appear as an RF shunt a second order harmonic of the first fundamental RF frequency.

13. The packaged amplifier of claim 12, wherein the fundamental RF frequency is in the range of 1.8 Ghz-2.2 GHz.

14. The packaged amplifier of claim 11, further comprising:

a second electrically conductive RF input lead extending away from the first side of the metal flange;

a second electrically conductive RF output lead extending away from the second side of the metal flange;

a second RF transistor die being mounted on the metal flange in the central die attach region and being electrically connected to the second RF input lead and the second RF output lead, and

a second harmonic filtering feature formed on a portion of the electrically insulating window frame and electrically connected to the second RF input lead,

wherein the second RF transistor die is configured to operate at a second fundamental RF frequency, and

wherein the second harmonic filtering feature is configured to filter a higher order harmonic of the second fundamental RF frequency.

15. The packaged amplifier of claim 14, wherein the second harmonic filtering feature forms a second microstripline open stub, wherein the second microstripline open stub comprises:

a fourth elongated span of microstripline that is continuously connected to the second RF input lead and extends away from the second RF input lead; and

a fifth elongated span of microstripline that is continuously connected to the fourth elongated span of microstripline and extends away from the fourth elongated span of microstripline towards the second side of the metal flange.

16. The packaged amplifier of claim 9, wherein the second harmonic termination forms a radial stub.