Semiconductor package device and method of manufacturing the same

• US 10,332,848 B2
• Filed: 01/02/2018
• Issued: 06/25/2019
• Est. Priority Date: 11/04/2016
• Status: Active Grant

• Current Assignee: Advanced Semiconductor Engineering Inc (ASE Technology Holding Co., Ltd.)
• Original Assignee: Advanced Semiconductor Engineering Inc (ASE Technology Holding Co., Ltd.)
• Inventors: Chiang, Chung-Hsin, Chi, Kuang-Ting, Cheng, Ming-Hsiang
• Primary Examiner(s): Kusumakar, Karen
• Application Number:
  US15/860,560
• Publication Number:
  US 20180130758A1
• Time in Patent Office: 539 Days
• CPC Class Codes: H01L 2223/6616 Vertical connections, e.g. vias
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device antennas per se H01Q
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 23/31 characterised by the arrangement or shape
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 2924/15313 being a land array, e.g. LGA
• CPC Class Codes: H01L 2924/1815 Shape
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: H01L 2924/19042 being an inductor
• CPC Class Codes: H01L 2924/19043 being a resistor
• CPC Class Codes: H01L 2924/19105 in a side-by-side arrangement on a common die mounting substrate

Abstract

The present disclosure provides a semiconductor package device comprising: (1) a substrate comprising a first area and a second area; (2) a semiconductor device on the first area of the substrate; (3) an antenna pattern on the second area of the substrate; (4) a first electronic component on the antenna pattern; and (5) a first package body encapsulating the first area of the substrate and the semiconductor device and exposing the antenna pattern, the first electronic component and the second area of the substrate. An upper surface of the first package body is non-coplanar with the antenna pattern on the second area of the substrate.

Claims

1. A semiconductor package device, comprising:

a substrate comprising a first area and a second area;

a semiconductor device on the first area of the substrate;

an antenna pattern on the second area of the substrate;

a first electronic component on the antenna pattern; and

a first package body encapsulating the first area of the substrate and the semiconductor device and exposing the antenna pattern, the first electronic component and the second area of the substrate,

wherein an upper surface of the first package body is non-coplanar with the antenna pattern on the second area of the substrate.

2. The semiconductor package device according to claim 1, further comprising a second package body encapsulating the second area of the substrate and the antenna pattern.

3. The semiconductor package device according to claim 1, further comprising a second electronic component on the second area of the substrate and a third electronic component on the second area of the substrate, wherein the antenna pattern further comprises:

a feeding line electrically connected to the semiconductor device;

a first line segment electrically connected to the feeding line by the first electronic component;

a second line segment electrically connected to the feeding line by the second electronic component; and

a third line segment electrically connected to the second line segment by the third electronic component.

4. The semiconductor package device according to claim 1, wherein a ratio of a width of the second area of the substrate to an operating wavelength of the antenna pattern is less than about 0.013.

5. The semiconductor package device according to claim 1, wherein a ratio of a width of the second area of the substrate to a length of the second area of the substrate is less than about 0.25.

6. The semiconductor package device according to claim 1, further comprising a shield on the first package body.

7. An electronic module, comprising:

a circuit board;

a first antenna pattern on the circuit board; and

a semiconductor package device on the circuit board, comprising;

a substrate; and

a second antenna pattern on the substrate, the second antenna pattern electrically connected to the first antenna pattern on the circuit board and non-coplanar with the first antenna pattern.

8. The electronic module according to claim 7, further comprising a first electronic component on the circuit board, wherein the first antenna pattern further comprises a first line segment and a second line segment electrically connected to the first line segment by the first electronic component.

9. The electronic module according to claim 8, wherein the first electronic component is a variable capacitor.

10. The electronic module according to claim 8, further comprising a second electronic component on the substrate and a third electronic component on the substrate, wherein the second antenna pattern further comprises a third line segment electrically connected to the first line segment of the first antenna pattern, a feeding line electrically connected to the third line segment by the second electronic component on the substrate, and a fourth line segment electrically connected to the feeding line by the third electronic component on the substrate.

11. The electronic module according to claim 10, further comprising a conductive pattern formed on a sidewall surface of the substrate, wherein the third line segment of the second antenna pattern is electrically connected to the first line segment of the first antenna pattern by the conductive pattern.

12. The electronic module according to claim 10, wherein the substrate comprises a conductive via, and the third line segment of the second antenna pattern is electrically connected to the first line segment of the first antenna pattern by the conductive via in the substrate, wherein the conductive via is beneath the third electronic component.

13. The electronic module according to claim 7, wherein the substrate comprises a first area and a second area, the semiconductor package device comprises a semiconductor device on the first area, and the second antenna pattern is disposed on the second area.

14. The electronic module according to claim 13, wherein a ratio of a width of the second area of the substrate to an operating wavelength of the first and second antenna patterns is less than about 0.013.

15. The electronic module according to claim 13, wherein a ratio of a width of the second area of the substrate to a length of the second area of the substrate is less than about 0.25.

16. An electronic module, comprising:

a circuit board;

a first antenna pattern on the circuit board and comprising a first line segment and a second line segment;

a first electronic component electrically connecting the first line segment and the second line segment; and

a semiconductor package device on the circuit board, comprising;

a substrate comprising a first area and a second area;

a semiconductor device on the first area of the substrate; and

a second antenna pattern on the second area of the substrate and electrically connected to the first antenna pattern on the circuit board,

wherein the first line segment of the first antenna pattern is spaced from the second line segment of the first antenna pattern.

17. The electronic module according to claim 16, wherein the second antenna pattern comprising a feeding line, a first line segment, a second line segment and a third line segment, wherein the feeding line is disposed between the first line segment of the second antenna pattern and the second line segment of the second antenna pattern, and the second line segment of the second antenna pattern is disposed between the feeding line and the third line segment.

18. The electronic module according to claim 17, wherein the semiconductor package device comprises a second electronic component electrically connecting the first line segment of the second antenna pattern and the feeding line, a third electronic component electrically connecting the feeding line and the second line segment of the second antenna pattern, and a fourth electronic component electrically connecting the second line segment of the second antenna pattern and the third line segment of the second antenna pattern.

19. The electronic module according to claim 17, further comprising:

a package body covering the first area of the substrate and exposing the second area of the substrate; and

a shield on the package body.