Display device and electronic device including the same
First Claim
Patent Images
1. A display device comprising:
- a display panel comprising;
a pixel portion comprising;
a pixel comprising;
a first transistor comprising;
a gate electrically connected to a scan line; and
a crystalline oxide semiconductor layer comprising indium, gallium, and zinc;
a second transistor comprising a gate electrically connected to a signal line through the first transistor; and
a light-emitting element electrically connected to a power supply line through the second transistor; and
a driver circuit portion comprising;
a gate line driver circuit; and
a display control circuit configured to switch between supply and stop of clock pulse to the driver circuit portion,wherein the clock pulse is to be supplied to the gate line driver circuit,wherein the crystalline oxide semiconductor layer has a crystallinity of 80% or more, andwherein a carrier concentration of the crystalline oxide semiconductor layer is less than 1×
1014/cm3.
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Accused Products
Abstract
A display device includes a pixel portion including a plurality of pixels each including a first transistor, a second transistor, and a light-emitting element, in which a gate of the first transistor is electrically connected to a scan line, one of a source and a drain of the first transistor is electrically connected to a signal line, and the other of them is electrically connected to a gate of the second transistor; one of a source and a drain of the second transistor is electrically connected to a power supply line and the other of them is electrically connected to the light-emitting element, and the first transistor includes an oxide semiconductor layer. A period when the display device displays a still image includes a period in which output of a signal to all the scan lines in the pixel portion is stopped.
266 Citations
22 Claims
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1. A display device comprising:
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a display panel comprising; a pixel portion comprising; a pixel comprising; a first transistor comprising;
a gate electrically connected to a scan line; and
a crystalline oxide semiconductor layer comprising indium, gallium, and zinc;a second transistor comprising a gate electrically connected to a signal line through the first transistor; and a light-emitting element electrically connected to a power supply line through the second transistor; and a driver circuit portion comprising; a gate line driver circuit; and a display control circuit configured to switch between supply and stop of clock pulse to the driver circuit portion, wherein the clock pulse is to be supplied to the gate line driver circuit, wherein the crystalline oxide semiconductor layer has a crystallinity of 80% or more, and wherein a carrier concentration of the crystalline oxide semiconductor layer is less than 1×
1014/cm3. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A display device comprising:
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a display panel comprising; a pixel portion comprising; a pixel comprising; a first transistor comprising;
a gate electrically connected to a scan line; and
a crystalline oxide semiconductor layer comprising indium, gallium, and zinc;a second transistor comprising a gate electrically connected to a signal line through the first transistor; and a light-emitting element electrically connected to a power supply line through the second transistor; and a driver circuit portion comprising; a gate line driver circuit; and a signal line driver circuit; and a display control circuit configured to switch between supply and stop of clock pulse to the driver circuit portion, wherein the clock pulse is to be supplied to the gate line driver circuit, wherein the crystalline oxide semiconductor layer has a crystallinity of 80% or more, and wherein a carrier concentration of the crystalline oxide semiconductor layer is less than 1×
1014/cm3. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A display device comprising:
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a display panel comprising; a pixel portion comprising; a pixel comprising; a first transistor comprising;
a gate electrically connected to a scan line; and
a crystalline oxide semiconductor layer comprising indium, gallium, and zinc;a second transistor comprising a gate electrically connected to a signal line through the first transistor; and a light-emitting element electrically connected to a power supply line through the second transistor; and a driver circuit portion comprising; a gate line driver circuit; a signal generation circuit configured to generate clock pulse and output the clock pulse to the driver circuit portion; and a display control circuit configured to switch between supply and stop of the clock pulse to the driver circuit portion, wherein the clock pulse is to be supplied to the gate line driver circuit, wherein the crystalline oxide semiconductor layer has a crystallinity of 80% or more, and wherein a carrier concentration of the crystalline oxide semiconductor layer is less than 1×
1014/cm3. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22)
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Specification
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Current AssigneeSemiconductor Energy Laboratory Co., Ltd.
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Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
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InventorsTakahashi, Kei, Yamazaki, Shunpei
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Primary Examiner(s)Cerullo, Liliana
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Application NumberUS15/372,839Publication NumberTime in Patent Office929 DaysField of SearchUS Class CurrentCPC Class CodesG09G 2300/0814 used for selection purposes...G09G 2300/0842 forming a memory circuit, e...G09G 2310/0286 Details of a shift register...G09G 2310/08 Details of timing specific ...G09G 3/3233 with pixel circuitry contro...G09G 3/3266 Details of drivers for scan...H01L 27/1225 with semiconductor material...H01L 29/78672 Polycrystalline or microcry...H01L 29/7869 having a semiconductor body...H10K 59/1213 the pixel elements being TFTsH10K 59/122 Pixel-defining structures o...H10K 59/123 Connection of the pixel ele...
