Stripe mapping in memory

• US 10,339,005 B2
• Filed: 08/29/2017
• Issued: 07/02/2019
• Est. Priority Date: 06/10/2015
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: McGlaughlin, Edward, Jeddeloh, Joseph M.
• Primary Examiner(s): Nguyen, Steve N
• Application Number:
  US15/689,114
• Publication Number:
  US 20170357467A1
• Time in Patent Office: 672 Days
• CPC Class Codes: G06F 11/10 Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
• CPC Class Codes: G06F 11/1012 using codes or arrangements adapted for a specific type of error G06F11/1048 takes precedence
• CPC Class Codes: G06F 11/108 Parity data distribution in semiconductor storages, e.g. in SSD
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0614 Improving the reliability of storage systems
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0629 Configuration or reconfiguration of storage systems
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays
• CPC Class Codes: G06F 3/0689 Disk arrays, e.g. RAID, JBOD

Abstract

Examples of the present disclosure provide apparatuses and methods related to redundant array of independent disks (RAID) stripe mapping in memory. An example method comprises writing data in a number of stripes across a storage volume of a plurality of memory devices according to a stripe map; wherein each of the number of stripes includes a number of elements; and wherein the stripe map includes a number of stripe indexes to identify the number of stripes and a number of element identifiers to identify elements included in each of the number of stripes.

Claims

1. A method for stripe mapping, comprising:

storing a first stripe map, wherein the first stripe map includes a number of stripe indexes to identify a number of stripes stored in a plurality of memory devices and a number of element identifiers to identify elements included in each of the number of stripes;

storing a second stripe map, wherein the second stripe map is an inverse stripe map of the first stripe map; and

performing a redundant array of independent disks (RAID) read error recovery operation using the second stripe map to identify a plurality of stripes that each include a bad element, wherein the RAID read error recovery operation corrects data in the bad element using parity data, moves the corrected data to a different element, and updates element identifiers of the plurality of stripes to include an identifier for the different element.

2. The method of claim 1, wherein the method includes creating the first stripe map by associating each of the number of stripe indexes with a portion of the elements included in each of the number of stripes.

3. The method of claim 1, wherein the method includes creating the first stripe map by associating each of the number of stripes with a parity element identifier.

4. The method of claim 1, wherein the method includes creating the first stripe map by selecting the elements to include in the number of stripes based on a bit error rate associated with the elements.

5. The method of claim 1, wherein the method includes creating the first stripe map by selecting the pages to include in the number of stripes based on a location of the pages within the plurality of memory devices.

6. The method of claim 1, further including writing data in the number of stripes includes splitting the data into the number of elements and writing the number of elements to the plurality of memory devices.

7. The method of claim 6, further including writing the number of elements to the plurality of memory devices includes writing at least one element to each of the plurality of memory devices.

8. An apparatus, comprising:

a number of memory devices; and

a controller coupled to the number of memory devices and configured to;

store a first stripe map comprising element identifiers for each element of a number of stripes in the number of memory devices;

write data to the number of memory devices, wherein the data is written to elements of the number of stripes as defined by the first stripe map;

store a second stripe map comprising an inverse stripe map of the first stripe map; and

perform a read error recovery operation using the second stripe map to identify a plurality of stripes that each include a bad element, wherein the read error recovery operation corrects data from the bad element in each of the plurality of stripes using parity data, moves the corrected data to a different element, and updates element identifiers for the plurality of stripes to include an identifier for the different element.

9. The apparatus of claim 8, wherein the element identifiers for each element includes channel, device, block, and page information.

10. The apparatus of claim 8, wherein elements of a particular stripe include varied bit error rates.

11. The apparatus of claim 8, wherein elements of a particular stripe are selected based on physical locations in the number of memory devices.

12. The apparatus of claim 8, wherein the controller is configured to update the first stripe map based on the read error recovery operation.

13. A method for stripe mapping, comprising:

storing a first stripe map, wherein the first stripe map is indexed by stripe and identifies each element that is associated with each particular stripe of a number of stripes in a plurality of memory devices;

storing a second stripe map, the second stripe map is indexed by element and identifies each stripe that is associated with each particular element of a number of elements in a plurality of memory devices; and

performing a read error recovery operation using the second stripe map to identify a plurality of stripes that each include a number of bad elements, wherein the read error recovery operation corrects data from the number of bad elements in each of the plurality of stripes using parity data, moves the corrected data to a different number of elements, and updates element identifiers for the plurality of stripes to include identifiers for the different number of elements.

14. The method of claim 13, wherein the method includes performing the read error recovery operation in response to an error correction code (ECC) operation failure.

15. The method of claim 13, wherein creating the first stripe map includes identifying each of the particular elements with a page identifier.

16. The method of claim 13, wherein the method includes updating the first stripe map by removing element identifiers of bad elements from the first stripe map.

17. The method claim 13, wherein the first stripe map includes a parity element identifier in each of the number of stripes.