System and method of interleaving data retrieved from first and second buffers

• US 10,339,079 B2
• Filed: 06/02/2014
• Issued: 07/02/2019
• Est. Priority Date: 06/02/2014
• Status: Active Grant

• Current Assignee: JP Morgan Chase Bank, N.A. (JP Morgan Chase & Co)
• Original Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Inventors: Dewitt, Dylan Mark, McCambridge, Colin Christopher
• Primary Examiner(s): Tsai, Henry
• Assistant Examiner(s): Bartels, Christopher A
• Application Number:
  US14/293,846
• Publication Number:
  US 20150347012A1
• Time in Patent Office: 1,856 Days
• Field of Search: None
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence
• CPC Class Codes: G06F 3/0656 Data buffering arrangements

Abstract

A host interface communicates with a non-volatile memory (NVM) device over a bus. The host interface includes a first buffer, a second buffer and a scatter/gather list (SGL). The first buffer stores blocks of application data to be communicated to the storage device. The second buffer stores blocks of protection data added by the host interface with respect to the blocks of application data stored in the first buffer. The SGL utilizes a first descriptor type that includes a first buffer address, a first buffer interleave burst length, and a burst count, and a second descriptor type that includes a second buffer address, and a second buffer interleave burst length, wherein only a first descriptor and a second descriptor is required to interleave application data from the first buffer with protection data from the second buffer.

Claims

1. A host system that communicates with a non-volatile memory (NVM) device over a network, the host system comprising:

a memory including a first buffer and a second buffer; and

a processor configured to execute a host interface configured to;

store blocks of application data to be communicated to the NVM device in the first buffer;

generate a respective block of metadata for each respective block of application data metadata;

store the respective blocks of metadata in the second buffer;

store a first descriptor type that includes a first buffer address, a first buffer interleave burst length, and a burst count indicating a total number of blocks contained in the first buffer, wherein there is a one-to-one correlation between blocks of application data and blocks of metadata; and

a second descriptor type that includes a second buffer address and a second buffer interleave burst length but no burst count in a scatter/gather list (SGL) stored in the memory, the second descriptor created by a host interface driver, wherein only a first descriptor of the first descriptor type and a second descriptor of the second descriptor type is required to interleave blocks of application data retrieved from the first buffer with associated blocks of protection data retrieved from the second buffer using, wherein the second descriptor employs the burst count of the first descriptor for said interleaving;

generate the scatter/gather list having pairs of descriptors wherein each pair is made from the first descriptor type and the second descriptor type, wherein a single pair of descriptors is configured to provide sufficient information for the NVM device to retrieve each of a plurality of blocks of data from the first buffer and the second buffer and to provide an interleaving of the data.

2. The host system of claim 1, wherein the memory comprises dynamic random access memory (DRAM).

3. The host system of claim 1, wherein the network is a peripheral component interface express (PCIe) bus.

4. The host system of claim 1, wherein the first buffer also stores blocks of application data read from the NVM device, and the second buffer also stores blocks of metadata read from the NVM device, wherein the first descriptor type and the second descriptor type are utilized to un-interleave data retrieved from the NVM device.

5. A system comprising:

a host system comprising;

a processor;

a memory that hosts a first buffer that stores blocks of application data, a second buffer that stores blocks of metadata, and a scatter/gather list that stores a first descriptor type that includes a first buffer address, a first buffer interleave burst length, and a burst count indicating a total number of blocks contained in the first buffer, wherein there is a one-to-one correlation between blocks of application data and blocks of metadata, and a second descriptor type that includes a second buffer address, and a second buffer interleave burst length but no burst count;

wherein the processor executes a host interface that;

generates the a respective block of metadata for each respective block of application data;

provides the respective blocks of metadata to the second buffer;

generates a first descriptor of the first descriptor type;

provides the first descriptor to the scatter/gather list;

generates a second descriptor of the second descriptor type, the second descriptor created by a host interface driver; and

provides the second descriptor to the scatter/gather list;

a communication bus;

generate the scatter/gather list having the descriptors, wherein a single pair of descriptors is configured to provide sufficient information for the NVM device to retrieve each of a plurality of blocks of data from the first buffer and the second buffer and to provide an interleaving of the data; and

a non-volatile memory (NVM) device that communicates with the host system via the communication bus, wherein the NVM device retrieves the first and second descriptors from the scatter/gather list and utilizes the first and second descriptors to interleave blocks of application data from the first buffer with blocks of metadata from the second buffer, wherein the second descriptor employs the burst count of the first descriptor for said interleaving.

6. The system of claim 5, wherein the communication bus is a peripheral component interface express (PCIe) bus.

7. The system of claim 5, wherein the storage device is a SCSI over PCIe (SOP) device.

8. The system of claim 5, wherein the non-volatile memory device retrieves all blocks of application data identified by the first descriptor from the first buffer, and then retrieves all blocks of metadata identified by the first and second descriptor from the second buffer.

9. The system of claim 8, wherein the non-volatile memory device interleaves the retrieved blocks of application data and retrieved blocks of metadata prior to saving interleaved data to non-volatile memory.

10. The system of claim 5, wherein the non-volatile memory device alternatively retrieves blocks of application data from the first buffer and blocks of metadata from the second buffer until all data indicated by the first and second descriptors has been retrieved.

11. A method of communicating data from a host system to a non-volatile memory (NVM) device over a bus, the method comprising:

adding, by a host interface executed by a processor, blocks of application data to a first buffer;

generating, by the host interface, a respective block of metadata for each respective block of application data;

adding, by the host interface, the respective blocks of metadata to a second buffer;

creating, by the host interface, a first descriptor of a first descriptor type that includes an address identifying a start of blocks application data in the first buffer, a burst length of the blocks of application data, and burst count indicating a total number of blocks contained in the first buffer, wherein there is a one-to-one correlation between blocks of application data and blocks of metadata;

creating, by the host interface, a second descriptor of a second descriptor type that includes an address identifying a start of the blocks of metadata in the second buffer, and a burst length of the blocks of metadata, but no burst count, wherein the first and second descriptor are stored to a scatter/gather list, the second descriptor created by a host interface driver;

generate the scatter/gather list having pairs of descriptors made from the first descriptor type and the second descriptor type, wherein a single pair of descriptors is configured to provide sufficient information for the NVM device to retrieve each of a plurality of blocks of data from the first buffer and the second buffer and to provide an interleaving of the data; and

retrieving the first descriptor and the second descriptor from the scatter/gather list and using the descriptors to interleave data retrieved from the first buffer and the second buffer, wherein the second descriptor employs the burst count of the first descriptor for said interleaving.

12. The method of claim 11, wherein the first buffer, the second buffer, and the scatter/gather list are stored in dynamic random access memory (DRAM).

13. The method of claim 11, further including:

retrieving, by the NVM device, all application data from the first buffer based on the first descriptor;

retrieving, by the NVM device, all metadata from the second buffer based on the second descriptor; and

interleaving, by the NVM device, the application data and the protest-ion-data metadata locally at the NVM device before storing to non-volatile memory.

14. The method of claim 11, further including:

a. retrieving, by the NVM device, a block of application data from the first buffer based on the first descriptor;

b. retrieving, by the NVM device, a block of metadata from the second buffer based on the second descriptor; and

c. repeating, by the NVM device, steps a. and b. until all application data and metadata identified in the first descriptor have been retrieved.

15. The method of claim 11, further comprising, creating, by the host interface, the metadata based on the corresponding blocks of application data.

16. The method of claim 11, wherein the bus is a peripheral component interface express (PCIe) bus.

17. The method of claim 11, wherein the NVM device is a SCSI over PCIe (SOP) device.