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Strobe acquisition and tracking

  • US 10,339,990 B2
  • Filed: 07/31/2017
  • Issued: 07/02/2019
  • Est. Priority Date: 12/20/2006
  • Status: Active Grant
First Claim
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1. A memory controller, comprising:

  • an interface to receive a data strobe signal and corresponding read data, wherein the data strobe signal and the read data correspond to a read command issued by the memory controller, and wherein the read data is received in accordance with the data strobe signal;

    a comparison circuit to determine a current timing offset between the data strobe signal and an internally generated data strobe enable signal, internally generated by the memory controller;

    data receive circuitry, including gate logic to gate the data strobe signal with the internally generated data strobe signal to generate a clean data strobe signal, and data capture logic responsive to the clean data strobe signal to capture the read data; and

    a circuit to dynamically determine a mode of operation of the memory controller in accordance with the determined current timing offset, wherein the mode of operation is selected from among a set of modes of operation that include a first mode of operation in which the memory controller synchronizes the internally generated data strobe enable signal with the received read data and data strobe signal, and a second mode of operation in which the memory controller maintains synchronization between the internally generated data strobe enable signal and the received read data and data strobe signal.

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