Analog neuromorphic circuits for dot-product operation implementing resistive memories
First Claim
1. A method for adjusting resistances of a plurality of resistive memories positioned in an analog neuromorphic circuit, comprising:
- applying a plurality of input voltages to the analog neuromorphic circuit, wherein each input voltage represents a vector value that is a non-binary value included in a vector that is incorporated into a dot-product operation with a plurality of matrix values included in a matrix;
providing a resistance value to each corresponding input voltage from a corresponding resistive memory included in a plurality of resistive memories, wherein each resistance value is a positive resistance value selected from a finite range of resistance values;
pairing each resistive memory with another resistive memory from the plurality of resistive memories so that each pair of resistive memories includes a pair of resistance values;
converting each pair of resistance values from a pair of resistance values selected from the finite range of resistance values to a single non-binary value;
mapping each single non-binary value to a matrix value included in the matrix that is incorporated into the dot-product operation with the vector values included in the vector; and
generating a plurality of dot-product operation values from the dot-product operation with the vector and the matrix, wherein each dot-product operation value is a non-binary value.
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Abstract
An analog neuromorphic circuit is disclosed having resistive memories that provide a resistance to each corresponding input voltage signal. Input voltages are applied to the analog neuromorphic circuit. Each input voltage represents a vector value that is a non-binary value included in a vector that is incorporated into a dot-product operation with weighted matrix values included in a weighted matrix. A controller pairs each resistive memory with another resistive memory. The controller converts each pair of resistance values to a single non-binary value. Each single non-binary value is mapped to a weighted matrix value included in the weighted matrix that is incorporated into the dot-product operation with the vector values included in the vector. The controller generates dot-product operation values from the dot-product operation with the vector and the weighted matrix where each dot-product operation is a non-binary value.
22 Citations
13 Claims
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1. A method for adjusting resistances of a plurality of resistive memories positioned in an analog neuromorphic circuit, comprising:
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applying a plurality of input voltages to the analog neuromorphic circuit, wherein each input voltage represents a vector value that is a non-binary value included in a vector that is incorporated into a dot-product operation with a plurality of matrix values included in a matrix; providing a resistance value to each corresponding input voltage from a corresponding resistive memory included in a plurality of resistive memories, wherein each resistance value is a positive resistance value selected from a finite range of resistance values; pairing each resistive memory with another resistive memory from the plurality of resistive memories so that each pair of resistive memories includes a pair of resistance values;
converting each pair of resistance values from a pair of resistance values selected from the finite range of resistance values to a single non-binary value;mapping each single non-binary value to a matrix value included in the matrix that is incorporated into the dot-product operation with the vector values included in the vector; and generating a plurality of dot-product operation values from the dot-product operation with the vector and the matrix, wherein each dot-product operation value is a non-binary value. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. An analog neuromorphic system that implements a plurality of resistive memories, comprising:
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a plurality of input voltages applied to an analog neuromorphic circuit, wherein each input voltage represents an image value that is a non-binary value included in an image matrix that is converted into a voltage vector; a plurality of resistive memories with each resistive memory configured to provide a resistance value to each corresponding input voltage, wherein each resistance value is mapped to a corresponding kernel value that is a non-binary value included in a kernel matrix; a controller configured to; convert each image value included in the image matrix into the corresponding input voltage that is included in a voltage vector, map each corresponding kernel value to a corresponding resistance value associated with a corresponding resistive memory, and generate a plurality of filtered image values from a dot-product operation with the image matrix represented by the plurality of input voltages and the kernel matrix represented by each resistance value associated with each of the resistive memories, wherein the plurality of filtered image values depicts a filtered image. - View Dependent Claims (9, 10, 11, 12, 13)
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Specification