EL display apparatus

• US 10,347,183 B2
• Filed: 10/10/2018
• Issued: 07/09/2019
• Est. Priority Date: 09/07/2001
• Status: Expired due to Term

• Current Assignee: JOLED Inc.
• Original Assignee: JOLED Inc.
• Inventors: Takahara, Hiroshi, Tsuge, Hitoshi
• Primary Examiner(s): Patel, Nitin
• Assistant Examiner(s): Bogale, Amen Woldesenbet
• Application Number:
  US16/156,660
• Publication Number:
  US 20190108791A1
• Time in Patent Office: 272 Days
• Field of Search: None
• CPC Class Codes: G09G 2300/0404 Matrix technologies
• CPC Class Codes: G09G 2300/0413 Details of dummy pixels or dummy lines in flat panels
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0814 used for selection purposes, e.g. logical AND for partial update
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0852 being a dynamic memory with more than one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2310/0205 Simultaneous scanning of several lines in flat panels
• CPC Class Codes: G09G 2310/0218 with collection of electrodes in groups for n-dimensional addressing
• CPC Class Codes: G09G 2310/0248 Precharge or discharge of column electrodes before or after applying exact column voltages
• CPC Class Codes: G09G 2310/0251 Precharge or discharge of pixel before applying new pixel voltage
• CPC Class Codes: G09G 2310/0256 with the purpose of reversing the voltage across a light emitting or modulating element within a pixel
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 2310/0289 Details of voltage level shifters arranged for use in a driving circuit
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2320/0247 Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
• CPC Class Codes: G09G 2320/0257 Reduction of after-image effects
• CPC Class Codes: G09G 2320/0261 in the context of movement of objects on the screen or movement of the observer relative to the screen
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2320/06 : Adjustment of display parameters
• CPC Class Codes: G09G 2320/0606 : Manual adjustment
• CPC Class Codes: G09G 2320/0626 : for control of overall brightness
• CPC Class Codes: G09G 2320/0646 : Modulation of illumination source brightness and image signal correlated to each other
• CPC Class Codes: G09G 2320/0653 : Controlling or limiting the speed of brightness adjustment of the illumination source
• CPC Class Codes: G09G 3/2003 : Display of colours specific for liquid crystal displays G09G3/3607
• CPC Class Codes: G09G 3/2007 : Display of intermediate tones
• CPC Class Codes: G09G 3/32 : semiconductive, e.g. using light-emitting diodes [LED]
• CPC Class Codes: G09G 3/3233 : with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3241 : the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
• CPC Class Codes: G09G 3/325 : the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver
• CPC Class Codes: G09G 3/3258 : with pixel circuitry controlling the voltage across the light-emitting element
• CPC Class Codes: G09G 3/3266 : Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3275 : Details of drivers for data electrodes
• CPC Class Codes: G09G 5/02 : characterised by the way in which colour is displayed details of colour display specific for CRTs G09G1/28; specific for flat matrix panels other than liquid crystal displays G09G3/2003; specific for liquid crystal displays G09G3/3607
• CPC Class Codes: H01L 27/124 : with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1251 : comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
• CPC Class Codes: H01L 27/1255 : integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/127 : with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/156 : two-dimensional arrays
• CPC Class Codes: H01L 29/78645 : with multiple gate
• CPC Class Codes: H01L 29/78672 : Polycrystalline or microcrystalline silicon transistor
• CPC Class Codes: H01L 33/56 : Materials, e.g. epoxy or silicone resin
• CPC Class Codes: H01L 33/58 : Optical field-shaping elements
• CPC Class Codes: H05K 999/99 : dummy group
• CPC Class Codes: H10K 50/8428 : Vertical spacers, e.g. arranged between the sealing arrangement and the OLED
• CPC Class Codes: H10K 50/844 : Encapsulations
• CPC Class Codes: H10K 50/846 : comprising getter material or desiccants
• CPC Class Codes: H10K 50/86 : Arrangements for improving contrast, e.g. preventing reflection of ambient light
• CPC Class Codes: H10K 59/12 : Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/1213 : the pixel elements being TFTs
• CPC Class Codes: H10K 59/1216 : the pixel elements being capacitors
• CPC Class Codes: H10K 59/126 : Shielding, e.g. light-blocking means over the TFTs
• CPC Class Codes: H10K 59/35 : comprising red-green-blue [RGB] subpixels
• CPC Class Codes: H10K 59/352 : the areas of the RGB subpixels being different

Abstract

An electroluminescent (EL) display apparatus and corresponding method of control are provided. A display screen includes gate signal lines which are arranged to intersect source signal lines. A pixel provided with an EL device corresponds to each intersection of the gate signal lines and the source signal lines. A driving transistor is provided for each pixel to supply a current to the EL device. A first switch transistor is provided for each pixel on a current path through which the current is supplied to the EL device. A gate driver circuit is connected to the gate signal lines. The gate driver circuit is configured to turn the first switch transistor on and off to simultaneously generate band-shaped non-display regions and band-shaped display regions on the display screen and to move the band-shaped non-display regions and the band-shaped display regions relative to the display screen.

Claims

1. An electroluminescent (EL) display apparatus, comprising:

a display screen including a plurality of gate signal lines which is arranged to intersect a plurality of source signal lines, and a pixel provided with an EL device corresponding to each intersection of the plurality of gate signal lines and the plurality of source signal lines;

a driving transistor provided for each pixel to supply a current to the EL device;

a first switch transistor provided for each pixel on a current path through which the current flows from a power line through the driving transistor to the EL device;

a second switch transistor provided for each pixel to supply, to the driving transistor, an image signal supplied by the plurality of source signal lines; and

a gate driver circuit including a first gate driver circuit and a second gate driver circuit,

wherein the plurality of gate signal lines includes first gate signal lines and second gate signal lines, one of the first gate signal lines is connected to a gate terminal of the first switch transistor, and one of the second gate signal lines is connected to a gate terminal of the second switch transistor,

the first gate driver circuit supplies an on/off signal for the first switch transistor to the one of the first gate signal lines and the second gate driver circuit supplies an on/off signal for the second switch transistor to the one of the second gate signal lines, and

the first gate signal lines are divided into a plurality of blocks, a plurality of first gate signal lines in one block is connected as one control line, and the first gate driver circuit is configured to select the plurality of first gate signal lines as a block simultaneously.

2. The EL display apparatus according to claim 1, further comprising:

a source driver circuit connected to the plurality of source signal lines,

wherein the source driver circuit is configured to supply a signal voltage to a gate of the driving transistor to flow a current which is N times as large as a predetermined value to the EL device to achieve a gray scale display indicated by an image signal, and

N is greater than one.

3. The EL display apparatus according to claim 1, wherein

the first gate driver circuit includes a first shift register circuit, and outputs a select signal or a non-select signal for the plurality of first gate signal lines,

the second gate driver circuit includes a second shift register circuit, and outputs a select signal or a non-select signal for a plurality of second gate signal lines,

the first gate driver circuit is configured to turn the first switch transistor on and off to control a duty ratio of an area of a non-display region on the display screen to an area of a display region on the display screen, and

the duty ratio is configured to be controlled by a start pulse fed to the first shift register circuit.

4. The EL display apparatus according to claim 3, wherein

the first gate driver circuit is configured to turn the first switch transistor on and off to control the duty ratio by controlling an input pulse timing of the start pulse fed to the first shift register circuit for one frame period.

5. The EL display apparatus according to claim 3, wherein

the start pulse fed to the first shift register circuit is generated at a control integrated circuit.

6. The EL display apparatus according to claim 3, wherein

the start pulse fed to the first shift register circuit is applied to the first gate driver circuit from a source driver circuit.

7. The EL display apparatus according to claim 3, wherein

the start pulse fed to the first shift register circuit is generated at a control integrated circuit, level-shifted at a source driver circuit, and applied to the first gate driver circuit.

8. The EL display apparatus according to claim 3, wherein

the first gate driver circuit is configured to change the duty ratio depending on a brightness adjustment.

9. The EL display apparatus according to claim 3, wherein

the first gate driver circuit is configured to turn the first switch transistor on and off to control the duty ratio by controlling an input pulse timing and an input pulse cycle of the start pulse fed to the first shift register circuit for one frame period.

10. The EL display apparatus according to claim 9, wherein

the first gate driver circuit is further configured to turn the first switch transistor on and off to simultaneously generate a plurality of band-shaped non-display regions and a plurality of band-shaped display regions on the display screen and to move the plurality of band-shaped non-display regions and the plurality of band-shaped display regions relative to the display screen.

11. The EL display apparatus according to claim 10, wherein

the first gate driver circuit is further configured to turn the first switch transistor on and off to control a number of divisions by which the display screen is divided into the plurality of band-shaped non-display regions and the plurality of band-shaped display regions by controlling the input pulse timing of the start pulse fed to the first shift register circuit for one frame period.

12. The EL display apparatus according to claim 10, wherein

the plurality of band-shaped non-display regions is spaced apart on the display screen, and

the plurality of band-shaped display regions is spaced apart on the display screen.

13. The EL display apparatus according to claim 1, wherein

the first switch transistor and the second switch transistor are independently on/off controlled by the first gate driver circuit and the second gate driver circuit.

14. The EL display apparatus according to claim 1, wherein

each pixel includes sub-pixels of a plurality of color types, and

the first gate driver circuit is configured to supply the on/off signal to the one of the first gate signal lines to individually select the sub-pixels of the plurality of color types.

15. The EL display apparatus according to claim 1, further comprising:

a third switch transistor between a gate terminal and a drain terminal of the driving transistor,

wherein the one of the second gate signal lines is connected to a gate terminal of the third switch transistor, and

the second driver circuit supplies an on/off signal for the third switch transistor to the one of the second gate signal lines.

16. The EL display apparatus according to claim 15, wherein

the first switch transistor, the third switch transistor, and the second switch transistor are independently on/off controlled by the first gate driver circuit and the second gate driver circuit.

17. The EL display apparatus according to claim 1, wherein

the first gate driver circuit is configured to select the plurality of the first gate signal lines simultaneously.

18. An electronic device, comprising:

the EL display apparatus according to claim 1.

19. A method of controlling an electroluminescent (EL) display apparatus,

the electroluminescent (EL) display apparatus, comprising:

a display screen including a plurality of gate signal lines which is arranged to intersect a plurality of source signal lines, and a pixel provided with an EL device corresponding to each intersection of the plurality of gate signal lines and the plurality of source signal lines;

a driving transistor provided for each pixel to supply a current to the EL device;

a first switch transistor provided for each pixel on a current path through which the current flows from a power line through the driving transistor to the EL device;

a second switch transistor provided for each pixel to supply, to the driving transistor, an image signal supplied by the plurality of source signal lines; and

a gate driver circuit including a first gate driver circuit and a second gate driver circuit,

wherein the plurality of gate signal lines includes first gate signal lines and second gate signal lines, one of the first gate signal lines is connected to a gate terminal of the first switch transistor and one of the second gate signal lines is connected to a gate terminal of the second switch transistor,

the first gate driver circuit supplies an on/off signal for the first switch transistor to the one of the first gate signal lines and the second gate driver circuit supplies an on/off signal for the second switch transistor to the one of the second gate signal lines,

the first gate signal lines are divided into a plurality of blocks, and a plurality of first gate signal lines in one block is connected as one control line,

the method comprising;

selecting, by the first gate driver circuit, the plurality of first gate signal lines in the one block simultaneously.

20. The method of controlling the EL display apparatus according to claim 19, wherein

the first gate driver circuit includes a first shift register circuit, and outputs a select signal or a non-select signal for the plurality of first gate signal lines,

the second gate driver circuit includes a second shift register circuit, and outputs a select signal or a non-select signal for a plurality of second gate signal lines,

the first gate driver circuit is configured to turn the first switch transistor on and off to control a duty ratio of an area of a non-display region on the display screen to an area of a display region on the display screen, and

the duty ratio is configured to be controlled by a start pulse fed to the first shift register circuit.