Shallow trench textured regions and associated methods

• US 10,347,682 B2
• Filed: 06/05/2017
• Issued: 07/09/2019
• Est. Priority Date: 06/29/2013
• Status: Active Grant

• Current Assignee: SiOnyx, LLC (DC Capital Partners, LLC)
• Original Assignee: SiOnyx, LLC (DC Capital Partners, LLC)
• Inventors: Haddad, Homayoon, Jiang, Jutao
• Primary Examiner(s): Everhart, Caridad
• Application Number:
  US15/614,256
• Publication Number:
  US 20170271394A1
• Time in Patent Office: 764 Days
• CPC Class Codes: B23K 26/355 Texturing
• CPC Class Codes: B82Y 40/00 Manufacture or treatment of nanostructures
• CPC Class Codes: H01L 27/14625 Optical elements or arrangements associated with the device
• CPC Class Codes: H01L 27/14629 Reflectors
• CPC Class Codes: H01L 27/1463 Pixel isolation structures
• CPC Class Codes: H01L 27/14632 Wafer-level processed structures
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14689 MOS based technologies
• CPC Class Codes: H01L 31/02327 the optical elements being integrated or being directly associated to the device, e.g. back reflectors optical coatings H01L31/0216
• CPC Class Codes: H01L 31/028 including, apart from doping material or other impurities, only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/182 Special manufacturing methods for polycrystalline Si, e.g. Si ribbon, poly Si ingots, thin films of polycrystalline Si

Abstract

Photosensitive devices and associated methods are provided. In one aspect, for example, a photosensitive imager device can include a semiconductor layer having multiple doped regions forming a least one junction, a textured region coupled to the semiconductor layer and positioned to interact with electromagnetic radiation. The textured region can be formed from a series of shallow trench isolation features.

Claims

1. An optoelectronic device having enhanced absorption of electromagnetic radiation, comprising:

a semiconductor layer having a light incident side and an opposed side, said semiconductor layer having multiple doped regions forming at least one junction,

a textured region comprising a plurality of shallow trench isolation surface features located on the light incident side of the semiconductor layer and configured to interact with incident electromagnetic radiation,

a support substrate coupled to said semiconductor layer, and

a first bonding layer disposed between the semiconductor layer and the support substrate,

wherein said optoelectronic device is a photosensitive imager device capable of detecting visible and infrared electromagnetic radiation.

2. The device of claim 1, wherein the semiconductor layer is single crystal silicon.

3. The device of claim 1, wherein the shallow trench isolation surface features are formed in the semiconductor layer.

4. The device of claim 1, wherein the shallow trench isolation surface features have a substantially uniform height.

5. The device of claim 1, wherein the shallow trench isolation surface features are not uniform in height.

6. The device of claim 1, further comprising a device layer coupled to the semiconductor layer on said side opposed to the light incident side.

7. The device of claim 1, wherein said first bonding layer comprises any of silicon oxide, silicon nitride and amorphous silicon.

8. The device of claim 1, wherein said semiconductor layer has a thickness in a range of about 1 micron to about 10 microns.

9. The device of claim 1, wherein said bonding layer has a thickness in a range of about 30 nm to about 3 microns.

10. The device of claim 1, wherein said bonding layer has a thickness in a range of about 40 nm to about 2 microns.

11. The device of claim 1, wherein said plurality of shallow trench isolation surface features have a height in a range of about 50 nm to about 20 microns.

12. The device of claim 1, wherein said shallow trench isolation surface features comprise pyramids.

13. The device of claim 1, wherein said plurality of shallow trench isolation surface features are formed by using a patterned mask and photolithography followed by etching.

14. The device of claim 1, wherein said plurality of shallow trench isolation surface features comprise multiple etched levels.

15. The device of claim 1, wherein said textured region enhances absorption of electromagnetic radiation within said semiconductor layer.

16. The device of claim 1, wherein said textured region increases optical absorption of the semiconductor layer over an electromagnetic spectrum range of at least about 700 nm to about 1100 nm.

17. The device of claim 1, wherein said textured region increases effective optical path length of light as it passes through the semiconductor layer.

18. The device of claim 1, wherein said textured region allows the semiconductor layer to experience multiple passes of light.

19. The device of claim 1, further comprising a second bonding layer positioned between the first bonding layer and the support substrate.

20. The device of claim 19, further comprising a reflector layer disposed between the first bonding layer and the second bonding layer.

21. The device of claim 1, wherein the shallow trench isolation surface features are arranged according to a pattern.

22. The device of claim 21, wherein the pattern is an at least substantially uniform grid.

23. The device of claim 21, wherein the pattern is a non-uniform arrangement.

26. The device of claim 1, further comprising deep trench isolation for isolating the device.

27. The device of claim 26, wherein said deep trench isolation provides light trapping functionality.

24. A method of making an optoelectronic device, comprising:

bonding a semiconductor layer to a support substrate, wherein bonding the semiconductor layer to the support substrate includes;

depositing a first bonding layer onto the semiconductor layer; and

bonding the first bonding layer to a second bonding layer disposed on the support substrate; and

creating a plurality of shallow trench isolation surface features on a light incident side of said semiconductor layer.

25. The method of claim 24, wherein the step of creating the plurality of shallow trench isolation surface features comprises generating an array of surface features using shallow trench isolation etching.

28. An optoelectronic device having enhanced absorption of electromagnetic radiation, comprising:

a semiconductor layer having a light incident side and an opposed side, said semiconductor layer having multiple doped regions forming at least one junction,

a textured region comprising a plurality of shallow trench isolation surface features located on the light incident side of the semiconductor layer and configured to interact with incident electromagnetic radiation,

a support substrate coupled to said semiconductor layer, and

a first bonding layer disposed between the semiconductor layer and the support substrate,

a second bonding layer positioned between the first bonding layer and the support substrate, and

a reflector layer disposed between the first bonding layer and the second bonding layer.

29. The device of claim 28, wherein said shallow trench isolation surface features comprise pyramids.

30. The device of claim 28, wherein said plurality of shallow trench isolation surface features are formed by using a patterned mask and photolithography followed by etching.

31. The device of claim 28, wherein said semiconductor layer has a thickness in a range of about 1 micron to about 10 microns.

32. The device of claim 28, wherein the shallow trench isolation surface features have a substantially uniform height.

33. The device of claim 28, wherein the shallow trench isolation surface features are not uniform in height.

34. The device of claim 28, wherein said plurality of shallow trench isolation surface features have a height in a range of about 50 nm to about 20 microns.

35. The device of claim 28, wherein said photosensitive imager device is capable of detecting visible and infrared electromagnetic radiation.

36. The device of claim 28, wherein said textured region enhances absorption of electromagnetic radiation within said semiconductor layer.

37. The device of claim 28, wherein said textured region increases optical absorption of the semiconductor layer over an electromagnetic spectrum range of at least about 700 nm to about 1100 nm.

38. The device of claim 28, wherein said textured region increases effective optical path length of light as it passes through the semiconductor layer.

39. The device of claim 28, wherein said textured region allows the semiconductor layer to experience multiple passes of light.

40. The device of claim 28, further comprising deep trench isolation for isolating the device.

41. The device of claim 40, wherein said deep trench isolation provides light trapping functionality.

42. The device of claim 28, wherein the shallow trench isolation surface features are arranged according to a pattern.

43. The device of claim 42, wherein the pattern is an at least substantially uniform grid.

44. The device of claim 42, wherein the pattern is a non-uniform arrangement.