Semiconductor device having insulating film including low-density region

• US 10,347,768 B2
• Filed: 01/16/2018
• Issued: 07/09/2019
• Est. Priority Date: 07/20/2012
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Koezuka, Junichi, Sasaki, Toshinari, Tochibayashi, Katsuaki, Yamazaki, Shunpei
• Primary Examiner(s): Miller, Jami Valentine
• Application Number:
  US15/872,154
• Publication Number:
  US 20180158956A1
• Time in Patent Office: 539 Days
• Field of Search: 257 43, 438104
• CPC Class Codes: G02F 1/13306 Circuit arrangements or driving methods for the control of single liquid crystal cells G02F1/132, G02F1/133382 take precedence
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/1339 Gaskets; Spacers; Sealing of cells
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 1/13439 characterised by their electrical, optical, physical properties; materials therefor; method of making
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2201/121 common or background
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/14612 involving a transistor
• CPC Class Codes: H01L 27/14616 characterised by the channel of the transistor, e.g. channel having a doping gradient
• CPC Class Codes: H01L 27/15 including semiconductor components having potential barriers, specially adapted for light emission
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements

Abstract

A change in electrical characteristics of a semiconductor device including an interlayer insulating film over a transistor including an oxide semiconductor as a semiconductor film is suppressed. The structure includes a first insulating film which includes a void portion in a step region formed by a source electrode and a drain electrode over the semiconductor film and contains silicon oxide as a component, and a second insulating film containing silicon nitride, which is provided in contact with the first insulating film to cover the void portion in the first insulating film. The structure can prevent the void portion generated in the first insulating film from expanding outward.

Claims

1. A semiconductor device comprising:

an oxide semiconductor film;

an oxide insulating film over the oxide semiconductor film; and

a nitride insulating film over and in contact with the oxide insulating film,

wherein the oxide insulating film comprises a low-density region whose density is lower than density of the oxide insulating film other than the low-density region, and

wherein the nitride insulating film covers the low-density region of the oxide insulating film.

2. The semiconductor device according to claim 1, further comprising:

a conductive film over and electrically connected to the oxide semiconductor film,

wherein the oxide insulating film is over the conductive film, and

wherein the oxide insulating film comprises the low-density region in a region covering a side end surface of the conductive film.

3. The semiconductor device according to claim 1,

wherein the nitride insulating film is denser than the oxide insulating film.

4. The semiconductor device according to claim 1,

wherein the oxide insulating film is a silicon oxynitride film, and

wherein the nitride insulating film is a silicon nitride film.

5. The semiconductor device according to claim 1,

wherein the oxide insulating film is a silicon oxide film, and

wherein the nitride insulating film is a silicon nitride film.

6. The semiconductor device according to claim 1,

wherein the oxide insulating film has a thickness larger than the nitride insulating film.

7. The semiconductor device according to claim 1,

wherein the oxide semiconductor film comprises In, Ga and Zn.

8. The semiconductor device according to claim 1,

wherein the oxide insulating film comprises a stack of layers.

9. A display device comprising the semiconductor device according to claim 1.

10. A semiconductor device comprising:

a gate electrode;

an oxide semiconductor film;

a gate insulating film between the gate electrode and the oxide semiconductor film;

a source electrode and a drain electrode over the oxide semiconductor film;

an oxide insulating film over the oxide semiconductor film, the source electrode and the drain electrode; and

a nitride insulating film over and in contact with the oxide insulating film,

wherein the oxide insulating film comprises low-density regions in regions covering side end surfaces of the source electrode and the drain electrode,

wherein density of each of the low-density regions is lower than density of the oxide insulating film other than the low-density regions, and

wherein the nitride insulating film covers the low-density regions of the oxide insulating film.

11. The semiconductor device according to claim 10,

wherein the nitride insulating film is denser than the oxide insulating film.

12. The semiconductor device according to claim 10, further comprising:

a pixel electrode over the nitride insulating film,

wherein the pixel electrode is electrically connected to one of the source electrode and the drain electrode through an opening in the oxide insulating film and an opening in the nitride insulating film.

13. The semiconductor device according to claim 10,

wherein the oxide insulating film is a silicon oxynitride film, and

wherein the nitride insulating film is a silicon nitride film.

14. The semiconductor device according to claim 10,

wherein the oxide insulating film is a silicon oxide film, and

wherein the nitride insulating film is a silicon nitride film.

15. The semiconductor device according to claim 10,

wherein the oxide semiconductor film comprises In, Ga and Zn.

16. The semiconductor device according to claim 10,

wherein the oxide insulating film comprises a stack of layers.

17. A display device comprising the semiconductor device according to claim 10.