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Radar target detection system for autonomous vehicles with ultra-low phase noise frequency synthesizer

  • US 10,348,313 B2
  • Filed: 08/07/2017
  • Issued: 07/09/2019
  • Est. Priority Date: 06/18/2015
  • Status: Expired due to Fees
First Claim
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1. An autonomous vehicle system, comprising:

  • a RADAR configured to detect at least one object, wherein the RADAR comprises;

    a). at least one transmitter for transmitting at least one radio signal to the at least one object;

    b). at least one receiver for receiving the at least one radio signal returned from the at least one object;

    c). at least one ultra-low phase noise frequency synthesizer, wherein the at least one ultra-low phase noise frequency synthesizer comprises;

    (i) at least one clocking device configured to generate at least one clock signal of at least one clock frequency;

    (ii) at least one sampling Phase Locked Loop (PLL), wherein the at least one sampling PLL comprises;

    (a) at least one sampling phase detector configured to receive the at least one clock signal and a single reference frequency to generate at least one first analog control voltage; and

    (b) at least one reference Voltage Controlled Oscillator (VCO) configured to receive the at least one first analog control voltage or at least one second analog control voltage to generate the single reference frequency, wherein at least one digital control voltage controls one of the at least one first analog control voltage or the at least one second analog control voltage received by the at least one reference VCO;

    (iii) at least one main Phase Locked Loop (PLL), wherein the at least one main PLL comprises;

    (a) at least one Fractional-N synthesizer, wherein the at least one Fractional-N synthesizer further comprises;



    (1) at least one high frequency Digital Phase/Frequency detector configured to receive and compare the at least one clock frequency and at least one feedback frequency to generate the at least one second analog control voltage and at least one digital control voltage; and



    (2) at least one variable frequency divider configured to divide at least one intermediate signal by a predetermined factor N to generate at least one feedback signal of the at least one feedback frequency;

    (b) at least one main VCO configured to receive at least one third analog control voltage and generate at least one output signal of at least one output frequency; and

    (c) at least one down convert mixer configured to mix the at least one output frequency and the single reference frequency to generate the at least one intermediate signal of at least one intermediate frequency.

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