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Memory decision feedback equalizer bias level generation

  • US 10,348,534 B1
  • Filed: 01/08/2018
  • Issued: 07/09/2019
  • Est. Priority Date: 01/08/2018
  • Status: Active Grant
First Claim
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1. A device, comprising:

  • a receiver comprising;

    a first input configured to receive a reference signal;

    a second input configured to receive an adjustment signal; and

    a third input configured to receive a feedback signal, wherein the receiver is configured to generate a set of output signals based on the reference signal, the adjustment signal, and the feedback signal;

    an operational amplifier comprising;

    a fourth input configured to receive a first output signal of the set of output signals from the receiver;

    a fifth input configured to receive a second output signal of the set of output signals from the receiver, wherein the operational amplifier is configured to generate the feedback signal based on the first output signal and the second output signal; and

    a first output coupled to;

    the third input of the receiver; and

    an adjustment circuit of a decision feedback equalizer configured to transmit adjustment signals to compensate for inter-symbol interference of a bit due to a previously received bit of a bit stream, wherein the first output is configured to transmit the feedback signal to the third input and the adjustment circuit.

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