Digital readout method and apparatus

• US 10,348,993 B2
• Filed: 07/17/2017
• Issued: 07/09/2019
• Est. Priority Date: 09/30/2005
• Status: Active Grant

• Current Assignee: Massachusetts Institute of Technology
• Original Assignee: Massachusetts Institute of Technology
• Inventors: Kelly, Michael, Mooney, Daniel, Colonero, Curtis, Berger, Robert, Candell, Lawrence
• Primary Examiner(s): Pierre, Peguy Jean
• Application Number:
  US15/651,040
• Publication Number:
  US 20180160068A1
• Time in Patent Office: 722 Days
• Field of Search: 341120, 341172, 341155, 348241, 348302, 3482221
• CPC Class Codes: H03M 1/12 Analogue/digital converters H03M1/001 – H03M1/10 take precedence
• CPC Class Codes: H03M 1/145 the steps being performed sequentially in series-connected stages H03M1/141, H03M1/143, H03M1/16 take precedence
• CPC Class Codes: H03M 1/60 with intermediate conversion to frequency of pulses
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/772 comprising A/D, V/T, V/F, I/T or I/F converters

Abstract

Autonomously operating analog to digital converters are formed into a two dimensional array. The array may incorporate digital signal processing functionality. Such an array is particularly well-suited for operation as a readout integrated circuit and in combination with a sensor array, forms a digital focal plane array.

Claims

1. An apparatus comprising:

a sensor array comprising a sensor to generate an analog signal;

an analog-to-digital converter (ADC) array comprising an ADC operably coupled to the sensor, the ADC comprising a capacitance to be charged by the signal, the capacitance defining a least significant bit (LSB) of the ADC and configured to convert the analog signal into digital data; and

transfer circuitry, operably coupled to the ADC array, to transfer the digital data among ADCs in the ADC array synchronously with motion of an image across the sensor array,

wherein the ADC comprises a counter to store at least a portion of the digital data as a digital number and to increment and/or decrement the digital number in response to digital data transferred from another ADC in the ADC array.

2. The apparatus of claim 1, wherein the sensor array is a two-dimensional array and the ADC array is a two-dimensional array comprising one ADC per sensor in the sensor array.

3. The apparatus of claim 1, wherein the transfer circuitry is further configured to perform a digital signal processing operation on the digital data.

4. The apparatus of claim 3, wherein the digital signal processing operation comprises at least one of threshold filtering, high-pass filtering, low-pass filtering, edge-detection filtering, matched filtering, spatial filtering, temporal filtering, or spatio-temporal filtering.

5. The apparatus of claim 1, further comprising:

a controller, operably coupled to the transfer circuitry, to control shifts of the digital data among the ADC array.

6. The apparatus of claim 5, wherein the ADC array and the transfer circuitry are implemented in an integrated circuit and the controller is further configured to initiate transfer of the digital data from the integrated circuit.

7. The apparatus of claim 5, wherein the controller is further configured to vary a charge accumulation time of the capacitance.

8. A method comprising:

generating an analog signal with a sensor in a sensor array;

converting the analog signal to digital data at a first analog-to-digital converter (ADC) in an ADC array;

storing at least a portion of the digital data as a first digital number in a first counter; and

transferring the digital data from the first ADC to a second ADC in the ADC array synchronously with motion of an image across the sensor array,

wherein transferring the digital data comprises incrementing and/or decrementing a second digital number stored in a second counter.

9. The method of claim 8, wherein generating the analog signal comprising detecting a photon incident on the sensor.

10. The method of claim 9, further comprising:

performing a digital signal processing operation on the digital data.

11. The method of claim 10, wherein the digital signal processing operation comprises at least one of threshold filtering, high-pass filtering, low-pass filtering, edge-detection filtering, matched filtering, spatial filtering, temporal filtering, or spatio-temporal filtering.

12. The method of claim 9, wherein the ADC array is implemented in an integrated circuit, and further comprising:

controlling shifts of the digital data among the ADC array with a controller operably coupled to the ADC array.

13. The method of claim 12, further comprising:

initiating transfer of the digital data from the integrated circuit with the controller.

14. The method of claim 12, further comprising:

varying a charge accumulation time of a capacitance of the first ADC.

15. The method of claim 12, further comprising:

generating a representation of the image based on the digital data.

16. An apparatus comprising:

a sensor array comprising a sensor to generate an analog signal;

an analog-to-digital converter (ADC) array comprising an ADC operably coupled to the sensor, the ADC comprising a capacitance to be charged by the signal, the capacitance defining a least significant bit (LSB) of the ADC and configured to convert the analog signal into digital data;

transfer circuitry, operably coupled to the ADC array, to transfer the digital data among ADCs in the ADC array synchronously with motion of an image across the sensor array; and

a controller, operably coupled to the transfer circuitry, to control shifts of the digital data among the ADC array and to vary a charge accumulation time of the capacitance.

17. A method comprising:

generating an analog signal with a sensor in a sensor array;

converting the analog signal to digital data at a first analog-to-digital converter (ADC) in an ADC array; and

transferring the digital data from the first ADC to a second ADC in the ADC array synchronously with motion of an image across the sensor array;

controlling shifts of the digital data among the ADC array with a controller operably coupled to the ADC array; and

varying a charge accumulation time of a capacitance of the first ADC.