Semiconductor device and method for atomic layer deposition of a dielectric over a substrate

• US 10,354,923 B2
• Filed: 05/31/2017
• Issued: 07/16/2019
• Est. Priority Date: 05/31/2017
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Huang, Yen-Chun, Tang, Bang-Tai, Peng, Chih-Tang, Huang, Tai-Chun
• Primary Examiner(s): Ojeh, Nduka E
• Application Number:
  US15/610,266
• Publication Number:
  US 20180350693A1
• Time in Patent Office: 776 Days
• Field of Search: 257E2124, 257E21482, 257E21497, 438788, 438791
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02219 the compound comprising silicon and nitrogen
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/02348 treatment by exposure to UV light
• CPC Class Codes: H01L 21/823431 with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 21/823481 isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
• CPC Class Codes: H01L 27/088 the components being field-effect transistors with insulated gate
• CPC Class Codes: H01L 29/165 in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/7848 the means being located in the source/drain region, e.g. SiGe source and drain

Abstract

A method includes performing an atomic layer deposition (ALD) process to deposit a dielectric material over a substrate, curing the deposited dielectric material using an ultra violet (UV) light, and annealing the deposited dielectric material after the curing.

Claims

1. A method comprising:

performing multiple cycles of an atomic layer deposition (ALD) process, wherein the performing of one cycle includes;

supplying a gas comprising SiH₃N(C₃H₇)₂ and O₃ to a deposition chamber having a substrate to deposit a dielectric material over the substrate; and

supplying an O₂ plasma to the deposition chamber after the supplying of the gas;

curing the deposited dielectric material using an ultra violet (UV) light; and

annealing the deposited dielectric material after the curing, wherein the annealing comprises a steam anneal process performed at a temperature below about 450°

C. and for a time interval greater than about 30 minutes.

2. The method of claim 1, wherein a flow rate of SiH₃N(C₃H₇)₂ is between about 50 standard cubic centimeter per minute (sccm) to about 100 sccm, and a flow rate of O₃ is between about 4000 sccm to about 8000 sccm.

3. The method of claim 2, wherein the ALD process is performed at a pressure between about 1.5 torr to about 2.2 torr.

4. The method of claim 1, further comprising removing one or more gases from the deposition chamber after the supplying the gas and before the supplying the O₂ plasma.

5. The method of claim 1, wherein the UV light has a wavelength between about 200 nm to about 400 nm.

6. The method of claim 5, wherein the curing is performed at a temperature between about 10°

C. to about 450°

C.

7. The method of claim 6, wherein the curing is performed for a time interval between about 1 minute to about 4 minutes.

8. The method of claim 1, wherein O—

Si—

O—

H bonds are formed at a surface of the substrate when the gas comprising SiH₃N(C₃H₇)₂ and O₃ is introduced to the deposition chamber due to chemical reactions with the O₃.

9. The method of claim 8, wherein the SiH₃N(C₃H₇)₂ reacts with the O—

Si—

O—

H bonds to form O—

Si—

O—

SiH₃ bonds through chemisorption, forming a layer of insulation material.

10. The method of claim 9, wherein the O₃ reacts with the O—

SiH₃ bonds to form O—

Si—

OH bonds, oxidizing the layer of insulation material.

11. The method of claim 10, wherein the O—

Si—

OH bonds of the layer of insulation material react with the O₂ plasma and forms O—

Si—

O bonds, turning top portions of the layer of insulation into silicon oxide.

12. The method of claim 1, wherein the deposited dielectric material is formed such that it has a wet etch rate (WER) that is uniform from a top surface of the deposited dielectric material to a bottom surface of the deposited dielectric material.

13. The method of claim 1, wherein the steam anneal process is performed for a time interval between about 30 minutes to about 120 minutes.

14. A method comprising:

filling a recess over a substrate with an insulation material using an atomic layer deposition (ALD) process comprising a first deposition cycle including;

forming a first layer of the insulation material using a gas comprising SiH₃N(C₃H₇)₂ and O₃; and

treating the first layer using an O₂ plasma;

and performing a post treatment to reduce an etching rate of the insulation material, wherein the performing the post treatment comprises;

curing the insulation material using an ultra violet (UV) light; and

performing a steam anneal process over a time interval greater than about 30 minutes at temperatures below about 450°

C. to the insulation material after the curing.

15. The method of claim 14, wherein the ALD process further comprises a second deposition cycle after the first deposition cycle, wherein the second deposition cycle forms a second layer of the insulation material over the first layer of the insulation material.

16. The method of claim 14, wherein the curing process is performed at temperatures below about 450°

C.

17. A method of forming a Fin-Field Effect Transistor (FinFET) comprising:

forming a fin protruding above a substrate;

performing multiple cycles of an atomic layer deposition (ALD) process to deposit an oxide film in a recess adjacent to the fin, wherein the performing of one cycle of the ALD process comprises;

supplying a gas comprising a precursor SiH₃N(C₃H₇)₂ and an oxidant O₃ to a deposition chamber having the substrate to form a first layer of the oxide film;

removing the gas from the deposition chamber; and

performing a plasma process using an O₂ plasma to treat the first layer of the oxide film;

curing the oxide film using an ultra violet light; and

annealing the oxide film using a steam anneal process performed at a temperature between about 350°

C. and about 450°

C. over a time interval greater than about 30 minutes.

18. The method of claim 17, wherein the curing is performed at temperatures lower than about 450°

C.

19. The method of claim 17, wherein the plasma process is performed with a flow rate of O₂ plasma between about 50 sccm to about 100 sccm and a pressure of about 1.5 torr to about 2.2 torr.

20. The method of claim 17, wherein the plasma process is performed with a temperature between about 350°

C. and about 450°

C.