Semiconductor device

• US 10,355,078 B2
• Filed: 08/22/2016
• Issued: 07/16/2019
• Est. Priority Date: 03/16/2016
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Kono, Hiroshi, Suzuki, Takuma
• Primary Examiner(s): Rahman, Moin M
• Application Number:
  US15/243,522
• Publication Number:
  US 20170271437A1
• Time in Patent Office: 1,058 Days
• CPC Class Codes: H01L 29/063 Reduced surface field [RESURF] pn-junction structures
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A device includes a silicon carbide layer between first and second electrodes. The silicon carbide layer includes first region, second region between the first region and second electrode, and third region between the second region and second electrode. The device includes first and second trenches, through the second and third regions and terminating within the first region, having a layer formed thereon, and spaced by portions of the second and third regions. The silicon carbide layer includes fourth region between the third region and first trench, and fifth region between the third region and second trench. The second region includes a fourth portion between first and second portions, and a fifth portion between second and third portions. The first, second, and third portions have lower impurity than the fourth and fifth portions, and the fourth and fifth portions extend closer to the first electrode than do the other portions.

Claims

1. A semiconductor device, comprising:

a first electrode;

a second electrode;

a silicon carbide layer between the first electrode and the second electrode in a first direction, the silicon carbide layer comprising;

a first region of a first conductivity type between the first electrode and the second electrode in the first direction;

a contact region of a second conductivity type between the first region and the first electrode in the first direction;

a second region and a third region of the first conductivity type between the first region and the first electrode in the first direction; and

a fourth region, a fifth region, a sixth region, a seventh region, and an eighth region of the second conductivity type between the first region and the first electrode in the first direction;

a first trench extending through the fourth region in the first direction and terminating within the first region, the first trench having an insulating layer formed on the sidewalls and base thereof; and

a second trench extending through the fifth region in the first direction and terminating within the first region, the second trench having an insulating layer formed on the sidewalls and base thereof, wherein;

the second region is between the contact region and the first trench in a second direction intersecting the first direction, and the third region is between the contact region and the second trench in the second direction,

the sixth region is between the fourth region and the eighth region, and the seventh region between the eighth region and the fifth region,

the fourth, fifth, and eighth regions have a lower impurity concentration of the second conductivity type than that of the sixth and seventh regions, and

the sixth and seventh regions extend closer to the second electrode than the fourth, fifth, and eighth regions.

2. The semiconductor device of claim 1, wherein a distance from the first and second trenches to the second electrode in the first direction is less than a distance from the sixth and seventh regions to the second electrode in the first direction.

3. The semiconductor device of claim 1, wherein a distance from the sixth and seventh regions to the second electrode is less than a distance from the first and second trenches to the second electrode.

4. The semiconductor device of claim 1, wherein:

the sixth region is between the second region and the first region in the first direction; and

the seventh region is between the third region and the first region in the first direction.

5. The semiconductor device of claim 1, wherein the silicon carbide layer further comprises a first low concentration region of the second conductivity type between the fourth and the first region in the first direction.

6. The semiconductor device of claim 1, wherein the silicon carbide layer further comprises an electric field relaxation region of the second conductivity type extending from the contact region through the eighth region in the first direction, and terminating within the first region.

7. The semiconductor device of claim 6, wherein the electric field relaxation region is closer to the second electrode than the first and second trenches are.

8. The semiconductor device of claim 1, further comprising an insulating layer extending between the second trench and the first electrode in the first direction, and at least partially over the third region.

9. The semiconductor device of claim 1, wherein the silicon carbide layer further comprises a drain region of the first conductivity type between the first region and the second electrode, the drain region having a higher impurity concentration of the first conductivity type than the first region.

10. The semiconductor device of claim 1, further comprising a first trench electrode in the first trench and a second trench electrode in the second trench.

11. A semiconductor device, comprising:

a first electrode, a second electrode, and a silicon carbide layer therebetween in a first direction, the silicon carbide layer having a first surface contacting the first electrode and a second surface contacting the second electrode;

a first gate electrode and a second gate electrode extending inwardly of the first surface of the silicon carbide layer in the first direction towards the second electrode;

an insulating layer between the first and second gate electrodes in the first direction;

a first channel region of the silicon carbide layer located inwardly of the first surface, between the first gate electrode and the second electrode in a second direction intersecting the first direction, and adjacent to a first side surface of the first gate electrode and containing a first type impurity of a first concentration;

a second channel region of the silicon carbide layer located inwardly of the first surface, between the first gate electrode and the second electrode in a second direction intersecting the first direction, and adjacent to a second side surface of the second gate electrode and containing the first type impurity of the first concentration;

an intermediate region of the silicon carbide layer located inwardly of the first surface and between the first channel region and the second channel region in the second direction, the intermediate region containing the first type impurity;

a first stopper region of the silicon carbide layer located inwardly of the first surface and between the first channel region and the intermediate region in the second direction, the first stopper region extending in the silicon carbide layer to a position closer to the second electrode than the closest position of the first channel region and the intermediate region to the second electrode, the first stopper region having the first type impurity of a second concentration, the second concentration being higher than the first concentration;

a first low concentration region of the silicon carbide layer having the first type impurity of the first concentration between the first channel region and the second electrode; and

a second stopper region of the silicon carbide layer having the first type impurity extending through the intermediate region and extending closer to the second electrode than the closest locations of the first and second channel regions and the intermediate region to the second electrode.

12. The semiconductor device of claim 11, further comprising:

a second stopper region of the silicon carbide layer located inwardly of the first surface and between the second channel region and the intermediate region in the second direction, the second stopper region extending in the silicon carbide layer to a position closer to the second electrode than the closest position of the first channel region and the intermediate region to the second electrode, the second stopper region having the first type impurity of a third concentration, the third concentration being higher than the first concentration.

13. The semiconductor device of claim 11, wherein the first stopper region extends to a position closer to the second electrode than the closest position of the first and second gate electrodes to the second electrode.

14. A semiconductor device, comprising:

a silicon carbide layer having a first surface and a second surface opposite to the first surface;

a first electrode on the first surface;

a second electrode contacting the second surface;

a first trench and a second trench extending inwardly of the first surface of the silicon carbide layer, and spaced apart on the first surface in a first direction, the silicon carbide layer extending between the first and second trenches in a second direction intersecting the first direction;

a first trench electrode in the first trench and a second trench electrode in the second trench; and

a first insulating layer between the first trench electrode and the first electrode and a second insulating layer between the second trench electrode and the first electrode, wherein

the silicon carbide layer comprises;

a drift region of a first conductivity type;

a body region of a second conductivity type between the drift region and the first electrode in the second direction; and

a contact region of the second conductivity type between the body region and the first electrode, and spaced from both trenches in the first direction,

the body region comprises;

a first channel region extending in the first direction from the first trench towards the second trench;

an intermediate region spaced from the first channel region and between the first and second trenches;

a second channel region extending in the first direction from the second trench towards the first trench;

a first stopper region interposed between the first channel region and the intermediate region;

a second stopper region interposed between the intermediate region and the second channel region;

a first source region of the first conductivity type between the first trench and the contact region; and

a second source region of the first conductivity type between the second trench and the contact region,

the first and second stopper regions have a higher impurity concentration of the second conductivity type than that of the first and second channel regions and the intermediate region, and

at least one of the first and second stopper regions extends closer to the second electrode than any of the first and second channel regions and the intermediate region.

15. The semiconductor device of claim 14, wherein the first stopper region is located closer to the second electrode than are the first and second trenches.

16. The semiconductor device of claim 14, wherein the first and second trenches are located closer to the second electrode than is the first stopper region.