Electrode contact structure for semiconductor device

• US 10,355,125 B2
• Filed: 11/13/2014
• Issued: 07/16/2019
• Est. Priority Date: 05/14/2012
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: Grivna, Gordon M
• Primary Examiner(s): Page, Dale E
• Assistant Examiner(s): Jefferson, Quovaunda
• Application Number:
  US14/540,073
• Publication Number:
  US 20150069610A1
• Time in Patent Office: 1,706 Days
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/42364 characterised by the insulating layer, e.g. thickness or uniformity H01L29/42324 and H01L29/4234 take precedence
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/4916 the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/4933 with a silicide layer contacting the silicon layer, e.g. Polycide gate with a barrier layer between the silicide and silicon layers H01L29/4941
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/66363 Thyristors
• CPC Class Codes: H01L 29/66719 With a step of forming an insulating sidewall spacer
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

In one embodiment, a method for forming a semiconductor device having a shield electrode includes forming first and second shield electrode contact portions within a contact trench. The first shield electrode contact portion can be formed recessed within the contact trench and includes a flat portion. The second shield electrode contact portion can be formed within the contact trench and makes contact to the first shield electrode contact portion along the flat portion.

Claims

1. An electrode contact structure comprising:

a region of semiconductor material having first and second opposing major surfaces, wherein the region of semiconductor material includes an active area and a contact area;

a contact trench extending from the first major surface into the region of semiconductor material;

a first dielectric layer along a lower surface of the contact trench but not along an upper surface of the contact trench;

a first shield electrode contact portion adjacent the first dielectric layer within the contact trench, wherein the first shield electrode contact portion includes an upper surface recessed below the first major surface and includes a flat contact portion parallel to the second major surface, and wherein the entire upper surface of the first shield electrode contact portion and the flat contact portion reside substantially on the same plane;

a second dielectric layer overlying a part of the first shield electrode contact portion;

a gate electrode contact portion within the contact trench and overlying the second dielectric layer, wherein the gate electrode contact portion has a lower surface adjacent to the second dielectric layer, and wherein the flat contact portion is disposed below the lower surface of the gate electrode contact portion in a cross-sectional view; and

a second shield electrode contact portion in the contact trench and contacting the first shield electrode contact portion along the flat contact portion, wherein;

the gate electrode contact portion does not laterally overlap the flat contact portion in the cross-sectional view;

the second shield electrode contact portion is electrically insulated from the gate electrode contact portion by a third dielectric layer;

the first shield electrode contact portion further forms at least one shield electrode within the active area; and

the second shield electrode contact portion includes an upper surface that is recessed within the contact trench below the first major surface of the region of semiconductor material.

2. The structure of claim 1 further comprising a conductive layer disposed overlying the first major surface and electrically coupled to the second shield electrode contact portion.

3. The structure of claim 1 further comprising a conductive region formed in an upper portion of the second shield electrode contact portion, wherein the third dielectric layer is further disposed along the upper surface of the contact trench but not the lower surface of the contact trench.

4. The structure of claim 1, wherein the second dielectric layer comprises a thermal oxide.

5. An electrode contact structure comprising:

a region of semiconductor material having a major surface;

a contact trench extending from the major surface into the region of semiconductor material;

a first dielectric region along lower surfaces of the contact trench, but not along upper surfaces of the contact trench;

a first shield electrode contact portion adjacent the first dielectric region within the contact trench, wherein the first shield electrode contact portion has an upper surface, and wherein the entire upper surface within the contact trench is substantially planar without curving upward towards the first major surface, and wherein the upper surface is recessed below the major surface;

a second dielectric region along a first segment of the upper surface of the first shield electrode contact portion;

a gate electrode contact portion within the contact trench and overlying the second dielectric region, wherein the gate electrode contact portion has a lower surface adjacent to the second dielectric region, and wherein the gate electrode contact portion and the second dielectric region do not laterally overlap a second segment of the first shield electrode contact portion in a cross-sectional view, and wherein the first segment and the second segment are disposed below the lower surface of the gate electrode contact portion in the cross-sectional view;

a third dielectric region along upper surfaces of the contact trench; and

a second shield electrode contact portion within the contact trench adjacent the third dielectric region and contacting the second segment of the first shield electrode contact portion within the contact trench, wherein the second dielectric region extends out of the contact trench and overlaps the major surface of the region of semiconductor material.

6. The structure of claim 5 further comprising spacers between the third dielectric region and the second shield electrode contact portion, wherein at least one spacer electrically insulates the gate electrode contact portion from the second shield electrode contact portion.

7. The structure of claim 5 further comprising a conductive layer disposed overlying the major surface and electrically coupled to the second shield electrode contact portion.

8. The structure of claim 5, wherein:

the second shield electrode contact portion contacts the first shield electrode contact portion along a surface that is substantially orthogonal to sidewall surfaces of the contact trench; and

the second shield electrode contact portion is completely recessed within the contact trench below the major surface of the region of semiconductor material.

9. The structure of claim 5 further comprising a conductive region in an upper portion of the second shield electrode contact portion.

10. The structure of claim 9, wherein the conductive region comprises a silicide region.

11. The structure of claim 5 further comprising:

an inter-layer dielectric overlying the major surface and having an opening substantially aligned to the second shield electrode contact portion; and

a conductive plug in the opening and electrically coupled to the second shield electrode contact portion.

12. An electrode contact structure comprising:

a contact trench in a region of semiconductor material, the region of semiconductor material having first and second opposing major surfaces;

a first dielectric region along lower surfaces of the contact trench but not along upper surfaces of the contact trench;

a first conductive shield electrode contact portion in a lower portion of the contact trench adjacent the first dielectric region and having a recessed upper surface, wherein the entire recessed upper surface within the contact trench is substantially planar without curving upwards towards the first major surface in a cross-sectional view, and wherein the first conductive shield electrode contact portion is further coupled to at least one shield electrode structure in an active portion of the region of semiconductor material;

a second dielectric region disposed along a first segment of the recessed upper surface, the second dielectric region having a first opening adjoining a second segment of the recessed upper surface within the contact trench;

a conductive gate electrode contact portion within the contact trench and overlying the second dielectric region, wherein the conductive gate electrode contact portion has a lower surface adjacent the second dielectric region, and wherein the first segment and the second segment are disposed below the lower surface of the conductive gate electrode contact portion in the cross-sectional view, and wherein the conductive gate electrode contact portion does not laterally overlap the first opening in the cross-sectional view; and

a second conductive shield electrode contact portion in the contact trench and contacting the first conductive shield electrode contact portion along the second segment of the recessed upper surface, wherein the second conductive shield electrode contact portion is insulated from the conductive gate electrode contact portion and the region of semiconductor material.

13. The structure of claim 12 further comprising:

a third dielectric region disposed along the upper surfaces of the contact trench but not disposed along the lower surfaces of the contract trench.

14. The structure of claim 13, wherein the second conductive shield electrode contact portion terminates within the contact trench without overlapping onto the first major surface of the region of semiconductor material.

15. The structure of claim 13 further comprising:

a first spacer between the second conductive shield electrode contact portion and the region of semiconductor material; and

a second spacer insulating the second conductive shield electrode contact portion from the conductive gate electrode contact portion.

16. The structure of claim 13, wherein the third dielectric region overlaps the first major surface.

17. The structure of claim 13, wherein the first dielectric region comprises a deposited oxide.

18. The structure of claim 12 further comprising:

an inter-layer dielectric overlying the first major surface and having a second opening substantially aligned to the second conductive shield electrode contact portion; and

a conductive plug in the second opening and electrically coupled to the second conductive shield electrode contact portion.

19. The structure of claim 12 further comprising a conductive region disposed in an upper portion of the second conductive shield electrode contact portion.

20. The structure of claim 12 further comprising a conductive layer disposed overlying the first major surface and electrically coupled to the second conductive shield electrode contact portion.