Flip chip integration on qubit chips

• US 10,355,193 B2
• Filed: 11/28/2017
• Issued: 07/16/2019
• Est. Priority Date: 11/28/2017
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Rosenblatt, Sami, Orcutt, Jason S., Sandberg, Martin O., Brink, Markus, Adiga, Vivekananda P., Bronn, Nicholas T.
• Primary Examiner(s): Tran, Minh Loan
• Application Number:
  US15/823,675
• Publication Number:
  US 20190165238A1
• Time in Patent Office: 595 Days
• Field of Search: None
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: G06N 10/00 Quantum computing, i.e. information processing based on quantum-mechanical phenomena
• CPC Class Codes: H01L 2223/54426 for alignment
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/13109 Indium [In] as principal constituent
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/81203 Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
• CPC Class Codes: H01L 2224/81815 Reflow soldering
• CPC Class Codes: H01L 2225/06513 Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06534 Optical coupling
• CPC Class Codes: H01L 2225/06541 Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
• CPC Class Codes: H01L 2225/06593 Mounting aids permanently on device; arrangements for alignment
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 24/13 of an individual bump connector
• CPC Class Codes: H01L 24/16 of an individual bump connector
• CPC Class Codes: H01L 24/81 using a bump connector
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 25/50 Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 29/66977 Quantum effect devices, e.g. using quantum reflection, diffraction or interference effects, i.e. Bragg- or Aharonov-Bohm effects
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/013 : Alloys
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H10N 60/0912 : of Josephson-effect devices
• CPC Class Codes: H10N 60/12 : Josephson-effect devices
• CPC Class Codes: H10N 60/805 : for Josephson-effect devices
• CPC Class Codes: H10N 60/815 : for Josephson-effect devices
• CPC Class Codes: H10N 69/00 : Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00

Abstract

A quantum bit (qubit) flip chip assembly may be formed when a qubit it formed on a first chip and an optically transmissive path is formed on a second chip. The two chips may be bonded using solder bumps. The optically transmissive path may provide optical access to the qubit on the first chip.

Claims

1. A method for forming a quantum bit (qubit) flip-chip assembly, the method comprising:

forming a qubit on a first chip;

forming an optically transmissive path in a second chip; and

bonding the first chip to the second chip; and

wherein the optically transmissive path is located above the qubit.

2. The method of claim 1, wherein the path has an aperture with a diameter large enough to allow for treatment of the qubit.

3. The method of claim 1, wherein the optically transmissive path has an aperture of 100 microns or less.

4. The method of claim 1, further comprising laser annealing the qubit by applying a laser through a surface of the qubit chip that is opposite the second chip.

5. The method of claim 1, further comprising ion etching the qubit.

6. The method of claim 1, wherein the forming the optically transmissive path comprises drilling, using a high-power laser beam, the second chip to form a through-hole in the second chip.

7. The method of claim 6, wherein the etching comprises deep-reactive ion etching.

8. The method of claim 6, wherein the etching comprises a chemical etch, and wherein the chemical etch is a tetramethylammonium hydroxide (TMAH) etch.

9. The method of claim 1, wherein the forming the optically transmissive path comprises etching a through-hole in the second chip.

10. The method of claim 1, wherein the second chip comprises a transparent substrate.

11. The method of claim 10, wherein the transparent substrate is Magnesiumoxide (MgO).

12. A flip chip apparatus comprising:

a first chip comprising a qubit;

a second chip bonded to the first chip, wherein the first chip and the second chip are bonded by a plurality of solder bumps; and

wherein an optically transmissive path in the second chip provides for optical access to the qubit on the first chip.

13. The apparatus of claim 12, wherein the second chip comprises a transparent substrate.

14. The apparatus of claim 13, wherein the transparent substrate is sapphire.

15. The apparatus of claim 12, wherein the optically transmissive path has a diameter large enough to allow for treatment of one or more of the plurality of qubits.

16. The apparatus of claim 12, wherein the qubit is accessible for laser annealing via the optically transmissive path.

17. The apparatus of claim 12, wherein the optically transmissive path of the second chip is aligned with the qubit on the first chip.

18. The apparatus of claim 12, wherein the optically transmissive path is formed with a chemical etch.

19. The apparatus of claim 12, wherein the optically transmissive path is formed using a high-power laser beam.

20. The apparatus of claim 12, wherein the first chip is comprised of a transparent substrate.