×

Asynchronous interface

  • US 10,360,169 B2
  • Filed: 02/19/2016
  • Issued: 07/23/2019
  • Est. Priority Date: 03/30/2015
  • Status: Active Grant
First Claim
Patent Images

1. An asynchronous interface, comprising:

  • a transmission circuit configured to;

    transmit, with data of W bits data on a one-word basis, whereinW is an integer greater than or equal to 1; and

    transmit an REQ signal a value of which differs by one bit per transmission of the data of one word;

    a reception circuit that comprises a reception buffer, wherein a reception buffer word count of the reception buffer is n, n is an integer of 4 or more, andthe reception circuit is configured to;

    receive the data on the one-word basis from the transmission circuit, andtransmit an ACK signal to the transmission circuit,wherein a value of the ACK signal differs by one bit per reception of the data of one word;

    a data signal line configured to transfer the data from the transmission circuit to the reception circuit,wherein a first bit width of the data signal line is W;

    an REQ signal line a bit width of which is log2 (n) or more, the REQ signal line is configured to transfer the REQ signal from the transmission circuit to the reception circuit; and

    an ACK signal line a bit width of which is log2 (n) or more, the ACK signal line is configured to transfer the ACK signal from the reception circuit to the transmission circuit.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×