Power amplifier circuit

• US 10,361,664 B2
• Filed: 06/07/2018
• Issued: 07/23/2019
• Est. Priority Date: 06/08/2017
• Status: Active Grant

• Current Assignee: Murata Manufacturing Co Limited
• Original Assignee: Murata Manufacturing Co Limited
• Inventors: Matsui, Toshiki, Sasaki, Kenji, Harima, Fumio
• Primary Examiner(s): Nguyen, Patricia T
• Application Number:
  US16/002,457
• Publication Number:
  US 20180358933A1
• Time in Patent Office: 411 Days
• Field of Search: 330133
• CPC Class Codes: H01L 27/0772 Vertical bipolar transistor in combination with resistors only
• CPC Class Codes: H01L 29/41708 Emitter or collector electrodes for bipolar transistors
• CPC Class Codes: H01L 29/7304 the device being a resistive element, e.g. ballasting resistor transistors integrated with resistors H01L27/075
• CPC Class Codes: H01L 29/7371 Vertical transistors
• CPC Class Codes: H03F 1/0205 in transistor amplifiers
• CPC Class Codes: H03F 1/0277 Selecting one or more amplifiers from a plurality of amplifiers
• CPC Class Codes: H03F 1/30 Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in differential amplifiers H03F3/45479
• CPC Class Codes: H03F 1/302 in bipolar transistor amplifiers H03F1/303, H03F1/305, H03F1/307 take precedence
• CPC Class Codes: H03F 2200/21 Bias resistors are added at the input of an amplifier
• CPC Class Codes: H03F 2200/408 the output amplifying stage of an amplifier comprising three power stages
• CPC Class Codes: H03F 2200/447 the amplifier being protected to temperature influence
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 3/19 with semiconductor devices only
• CPC Class Codes: H03F 3/195 in integrated circuits
• CPC Class Codes: H03F 3/21 with semiconductor devices only H03F3/245 takes precedence
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/72 Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal

Abstract

A power amplifier circuit is capable of restraining uneven temperature distribution among a plurality of unit transistors while restraining the deterioration of the characteristics of the power amplifier circuit. The power amplifier circuit includes: a first transistor group which includes a plurality of unit transistors and which amplifies an input signal and outputs an amplified signal; a bias circuit which supplies a bias current or a bias voltage to a base or a gate of each unit transistor of the first transistor group; a plurality of first resistive elements, each of which is connected between the base or the gate of each unit transistor of the first transistor group and an output of the bias circuit; and a plurality of second resistive elements, each of which is connected between an emitter or a source of each unit transistor of the first transistor group and a reference potential.

Claims

1. A power amplifier circuit comprising:

a first transistor group comprising a plurality of unit transistors, and configured to amplify an input signal and output an amplified signal;

a bias circuit configured to supply a bias current or a bias voltage to a base or a gate of each of the plurality of unit transistor of the first transistor group;

a plurality of first resistive elements for each of the plurality of unit transistors of the first transistor group, each of the plurality of resistive elements being connected between the base or the gate of a respective unit transistor of the first transistor group and an output of the bias circuit;

a plurality of second resistive elements for each of the plurality of unit transistors of the first transistor group, each of the plurality of second resistive elements being connected between an emitter or a source of a respective unit transistor of the first transistor group and a reference potential;

a second transistor group comprising a second plurality of unit transistors and configured to amplify the input signal and output the amplified signal; and

a plurality of third resistive elements for each of the second plurality of unit transistors of the second transistor group, each of the plurality of third resistive elements connected between an emitter or a source of a respective unit transistor of the second transistor group and a reference potential, wherein;

when the power amplifier circuit outputs the amplified signal at or above a predetermined power level, the plurality of unit transistors of the first transistor group and the second plurality of unit transistors of the second transistor group are turned on, and

when the power amplifier circuit outputs the amplified signal at less than the predetermined power level, the plurality of unit transistors of the first transistor group are turned off, and the second plurality of unit transistors of the second transistor group are turned on.

7. The power amplifier circuit according to claim 1, wherein the reference potential is ground.

8. The power amplifier circuit according to claim 1, wherein the plurality of unit transistors of the first transistor group are heterojunction bipolar transistors.

9. The power amplifier circuit according to claim 1, wherein the plurality of unit transistors of the first transistor group, and the second plurality of unit transistors of the second transistor group, are heterojunction bipolar transistors.

2. A power amplifier circuit comprising:

a first transistor group comprising a plurality of unit transistors, and configured to amplify an input signal and output an amplified signal;

a bias circuit configured to supply a bias current or a bias voltage to a base or a gate of each of the plurality of unit transistor of the first transistor group;

a plurality of first resistive elements for each of the plurality of unit transistors of the first transistor group, each of the plurality of resistive elements being connected between the base or the gate of a respective unit transistor of the first transistor group and an output of the bias circuit; and

a plurality of second resistive elements for each of the plurality of unit transistors of the first transistor group, each of the plurality of second resistive elements being connected between an emitter or a source of a respective unit transistor of the first transistor group and a reference potential, wherein;

the power amplifier circuit is formed on a semiconductor substrate, and

at least one of the plurality of first resistive elements is formed on the semiconductor substrate further away from the respective unit transistor of the first transistor group, than a corresponding at least one of the plurality of second resistive elements.

4. The power amplifier circuit according to claim 2, further comprising:

a plurality of capacitive elements for each of the plurality of unit transistors, one end of each of the plurality of capacitive elements being supplied with the input signal, and another end of each of the plurality of capacitive elements being connected to the base or the gate of a respective unit transistor of the first transistor group.

5. The power amplifier circuit according to claim 4, wherein, in a planar view of the semiconductor substrate, the plurality of capacitive elements are formed between the unit transistors of the first transistor group and the plurality of first resistive elements.

10. The power amplifier circuit according to claim 2, wherein the reference potential is ground.

11. The power amplifier circuit according to claim 2, wherein the plurality of unit transistors of the first transistor group are heterojunction bipolar transistors.

3. A power amplifier circuit comprising:

a first transistor group comprising a plurality of unit transistors, and configured to amplify an input signal and output an amplified signal;

a bias circuit configured to supply a bias current or a bias voltage to a base or a gate of each of the plurality of unit transistor of the first transistor group;

a plurality of first resistive elements for each of the plurality of unit transistors of the first transistor group, each of the plurality of resistive elements being connected between the base or the gate of a respective unit transistor of the first transistor group and an output of the bias circuit;

a plurality of second resistive elements for each of the plurality of unit transistors of the first transistor group, each of the plurality of second resistive elements being connected between an emitter or a source of a respective unit transistor of the first transistor group and a reference potential; and

a plurality of capacitive elements for each of the plurality of unit transistors, one end of each of the plurality of capacitive elements being supplied with the input signal, and another end of each of the plurality of capacitive elements being connected to the base or the gate of a respective unit transistor of the first transistor group.

12. The power amplifier circuit according to claim 3, wherein the reference potential is ground.

13. The power amplifier circuit according to claim 3, wherein the plurality of unit transistors of the first transistor group are heterojunction bipolar transistors.

6. A power amplifier circuit comprising:

a first transistor group comprising a plurality of unit transistors, and configured to amplify an input signal and output an amplified signal;

a bias circuit configured to supply a bias current or a bias voltage to a base or a gate of each of the plurality of unit transistor of the first transistor group;

a plurality of first resistive elements for each of the plurality of unit transistors of the first transistor group, each of the plurality of resistive elements being connected between the base or the gate of a respective unit transistor of the first transistor group and an output of the bias circuit;

a plurality of second resistive elements for each of the plurality of unit transistors of the first transistor group, each of the plurality of second resistive elements being connected between an emitter or a source of a respective unit transistor of the first transistor group and a reference potential; and

a resistive element connected at one end to the output of the bias circuit and at another end to each of the plurality of first resistive elements.

14. The power amplifier circuit according to claim 6, wherein the reference potential is ground.

15. The power amplifier circuit according to claim 6, wherein the plurality of unit transistors of the first transistor group are heterojunction bipolar transistors.