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Transceiver for communication and method for controlling communication

  • US 10,361,793 B2
  • Filed: 07/25/2018
  • Issued: 07/23/2019
  • Est. Priority Date: 03/14/2016
  • Status: Active Grant
First Claim
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1. A clock extension peripheral interface (CXPI) communication circuit comprising:

  • a clock rise detector configured to detect a change of a signal on a CXPI communication bus from a low level to a high level, the signal generated by modulation of a timing signal from a master circuit;

    a timing module configured to determine a second time for which the signal is at a low level and to compare the second time to a first time;

    an encoder configured to extend a length of time the signal is at the low level by changing a data signal to be output to the CXPI communication bus from the high level to the low level, the data signal for pulling the signal on the CXPI communication bus to the low level; and

    a timing adjustment module configured to change the data signal to the low level at the second time.

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