Authenticator, authenticatee and authentication method

• US 10,361,851 B2
• Filed: 03/27/2018
• Issued: 07/23/2019
• Est. Priority Date: 08/31/2011
• Status: Active Grant

• Current Assignee: Kioxia Corporation
• Original Assignee: Toshiba Memory Corporation (Kioxia Corporation)
• Inventors: Kato, Taku, Matsushita, Tatsuyuki, Nagai, Yuji, Zhao, Fangming
• Primary Examiner(s): Chiang, Jason
• Application Number:
  US15/936,881
• Publication Number:
  US 20180227123A1
• Time in Patent Office: 483 Days
• CPC Class Codes: G06F 21/31 User authentication
• CPC Class Codes: G06F 21/34 involving the use of external additional devices, e.g. dongles or smart cards
• CPC Class Codes: G06F 21/6218 to a system of files or objects, e.g. local or distributed file system or database
• CPC Class Codes: H04L 2209/16 Obfuscation or hiding, e.g. involving white box
• CPC Class Codes: H04L 2209/24 Key scheduling, i.e. generating round keys or sub-keys for block encryption
• CPC Class Codes: H04L 9/0816 Key establishment, i.e. cryptographic processes or cryptographic protocols whereby a shared secret becomes available to two or more parties, for subsequent use
• CPC Class Codes: H04L 9/0869 involving random numbers or seeds
• CPC Class Codes: H04L 9/14 using a plurality of keys or algorithms
• CPC Class Codes: H04L 9/3271 using challenge-response

Abstract

According to one embodiment, an authenticator which authenticates an authenticatee, which stores first key information (NKey) that is hidden, includes a memory configured to store second key information (HKey) which is hidden, a random number generation module configured to generate random number information, and a data generation module configured to generate a session key (SKey) by using the second key information (HKey) and the random number information. The authenticator is configured such that the second key information (HKey) is generated from the first key information (NKey) but the first key information (NKey) is not generated from the second key information (HKey).

Claims

1. A system having a controller and a memory controlled by the controller, comprising:

a first storage area being used to store a first key and unique secret identification information, the first storage area being restricted from being read and written from outside;

a second storage area being used to store encrypted secret identification information generated by encrypting the secret identification information, the second storage area being read-only; and

a third storage area being readable and writable;

wherein the system is configured to;

generate a second key by using the first key;

generate a session key by using the second key;

generate first authentication information by processing the secret identification information with a session key in one-way function operation; and

generate second authentication information and transmit the second authentication information after generating the session key.

2. The system according to claim 1, wherein the memory is formed in a chip and the controller is formed separately from the chip.

3. A system having a controller and a memory comprising:

a storage area being used to store a first key, unique secret identification information, and encrypted secret identification information, the encrypted secret identification information being generated by encrypting the secret identification information, the first key and the secret identification information being prohibited from being read from outside, the encrypted secret identification information being readable from outside;

a data generator configured to generate a session key by using a second key, the second key being generated based on the first key; and

a one-way function processor configured to generate authentication information by processing the secret identification information with the session key in a one-way function operation as follows;

the authentication information=AES E (the session key, the secret identification information)+the secret identification information, where AES stands for advanced encryption standard.

4. The system according to claim 3, wherein the memory is formed in a chip and the controller is formed separately from the chip.

5. A system having a controller and a memory device controlled by the controller, comprising

a first area which stores first key data and unique first data, and is prohibited from being read from outside;

and

a second area which stores encrypted first data generated by encrypting the first data, and is readable, and wherein the system is configured to;

perform an AES (Advanced Encryption Standard) encryption process using the first key data and externally-provided second data to generate second key data,

perform an AES encryption process using the second key data and externally-provided third data to generate third key data, the third data being externally received, and

perform a one-way conversion process using the third key data and the first data to generate fourth data used for authentication with an external device.

6. The system according to claim 5, wherein the memory is formed in a chip and the controller is formed separately from the chip.