Reduced noise by performing processing during low-noise periods of interfering circuitry
First Claim
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1. An input device comprising:
- a display device;
a plurality of sensor electrodes; and
a processing system coupled with the plurality of sensor electrodes and configured to;
receive resulting signals from the plurality of sensor electrodes during a first period;
determine a plurality of low-noise periods associated with display updating of the display device, andprocess, using analog-to-digital conversion during the plurality of low-noise periods, the resulting signals received from the plurality of sensor electrodes during the first period, wherein the analog-to-digital conversion is performed as a plurality of iterations including first and second iterations, wherein the first iteration is performed during a first low-noise period of the plurality of low-noise periods and the second iteration is performed during a second low-noise period of the plurality of low-noise periods, and wherein the first low noise period and the first period are separated by a first delay corresponding to a high noise period and the first low noise period follows the first period.
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Abstract
An input device, system, and processing system are disclosed for a display device with an integrated sensing device. The input device comprises a plurality of sensor electrodes, and a processing system coupled with the plurality of sensor electrodes. The processing system is configured to determine one or more low-noise periods associated with display update timing of the display device, and process, during the determined one or more low-noise periods, resulting signals received from the plurality of sensor electrodes.
20 Citations
16 Claims
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1. An input device comprising:
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a display device; a plurality of sensor electrodes; and a processing system coupled with the plurality of sensor electrodes and configured to; receive resulting signals from the plurality of sensor electrodes during a first period; determine a plurality of low-noise periods associated with display updating of the display device, and process, using analog-to-digital conversion during the plurality of low-noise periods, the resulting signals received from the plurality of sensor electrodes during the first period, wherein the analog-to-digital conversion is performed as a plurality of iterations including first and second iterations, wherein the first iteration is performed during a first low-noise period of the plurality of low-noise periods and the second iteration is performed during a second low-noise period of the plurality of low-noise periods, and wherein the first low noise period and the first period are separated by a first delay corresponding to a high noise period and the first low noise period follows the first period. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A processing system comprising:
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a display device; display driver circuitry configured to update the display device based on display update timing of the display device; sensor circuitry coupled with a plurality of sensor electrodes and configured to; receive resulting signals from the plurality of sensor electrodes during a first period; determine a plurality of low-noise periods associated with display updating of the display device, and process, using analog-to-digital conversion during the plurality of low-noise periods, the resulting signals received from the plurality of sensor electrodes during the first period, wherein the analog-to-digital conversion is performed as a plurality of iterations including first and second iterations, wherein the first iteration is performed during a first low-noise period of the plurality of low-noise periods and the second iteration is performed during a second low-noise period of the plurality of low-noise periods, and wherein the first low noise period and the first period are separated by a first delay corresponding to a high noise period and the first low noise period follows the first period. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A system comprising:
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a processing system comprising analog-to-digital conversion (ADC) circuitry within a power domain; and interfering circuitry within the power domain, wherein the processing system is configured to; receive resulting signals from a plurality of sensor electrodes during a receiving period; determine one or more discrete noise events produced by the interfering circuitry, and; control the ADC circuitry to perform ADC operations to process the resulting signals during a plurality of time periods during which the one or more discrete noise events do not occur, wherein the ADC operations are performed as a plurality of iterations including first and second iterations, wherein the first iteration is performed during a first time period of the plurality of time periods and the second iteration is performed during a second time period of the plurality of time periods, and wherein the first time period and the receiving period are separated by a first delay corresponding to a high noise period and the first time period follows the receiving period. - View Dependent Claims (14, 15, 16)
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Specification