Non-volatile storage systems with go to sleep adaption

• US 10,365,841 B2
• Filed: 07/13/2015
• Issued: 07/30/2019
• Est. Priority Date: 12/12/2011
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Inventors: Elhamias, Reuven, Fishler, Ram
• Primary Examiner(s): Rones, Charles
• Assistant Examiner(s): Doan, Han
• Application Number:
  US14/798,199
• Publication Number:
  US 20150317094A1
• Time in Patent Office: 1,478 Days
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/1028 Power efficiency
• CPC Class Codes: G06F 3/0625 Power saving in storage systems
• CPC Class Codes: G06F 3/0634 by changing the state or mode of one or more devices
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A non-volatile memory system goes into a low-power standby sleep mode to reduce power consumption if a host command is not received within delay period. The duration of this delay period is adjustable. In one set of embodiments, host commands can specify the delay value, the operation types to which it applies, and whether the value is power the current power session or to be used to reset a default value as well. In other aspects, the parameters related to the delay value are kept in a host resettable parameter file. In other embodiments, the memory system monitors the time between host commands and adjusts this delay automatically.

Claims

1. A non-volatile memory system, comprising:

a non-volatile memory section that stores a delay value;

a volatile memory section that receives a copy of the delay value from the non- volatile memory section at initialization of the non-volatile memory system;

a host interface through which the memory system is connectable to a host to receive commands and power;

a controller, where the controller is configured to manage data in the non-volatile memory system in one of either a standard mode, in which the memory system executes commands from said host, or a low-power standby mode, into which the memory system lapses after the delay value subsequently to completing a first command in the standard mode unless subsequently receiving a second command from the host prior to lapsing into the standby mode; and

wherein the controller is configured to;

in response to receiving the second command prior to lapsing into the standby mode, decrease the delay value based on a first computation, wherein the first computation involves a first input including a measured interval between the first and second commands; and

in response to receiving the second command after lapsing into the standby mode, increase the delay value based on a second computation, wherein the second computation involves a second input including a first delay value, wherein the second input of the second computation is different from the first input of the first computation; and

wherein, in response to receiving a command from the host specifying a new delay value while in the low-power standby mode, the controller is configured to place the memory system into the standard mode and subsequently executed the command specifying the new delay value and reset the value of the delay value with the new delay value.

2. The non-volatile memory system of claim 1, wherein, in response to receiving the second command prior to lapsing into the standby mode the controller is configured to decrease the delay value to be intermediate to the delay value prior to receiving the first command and the time between the first and second commands.

3. The non-volatile memory system of claim 1, wherein, in response to receiving the second command after lapsing into the standby mode the controller is configured to increase the delay value to be intermediate to the delay value prior to receiving the first command and the first delay value.

4. The non-volatile memory system of claim 3, wherein the first delay value is a settable parameter for the memory system.

5. The non-volatile memory system of claim 3, wherein the controller is configured to increase the delay value by a fraction of the difference between the delay value prior to receiving the first command and the first delay value.

6. The non-volatile memory system of claim 5, wherein the fraction is a settable parameter for the memory system.

7. The non-volatile memory system of claim 5, wherein the controller is configured to dynamically determine the fraction.

8. The non-volatile memory system of claim 1, wherein managing data in the non-volatile memory system in the low-power standby mode includes turning off power to the memory section.

9. The non-volatile memory system of claim 1, wherein managing data in the non-volatile memory system in the low-power standby mode includes turning off a clock circuit of the memory section.

10. The non-volatile memory system of claim 1, wherein managing data in the non-volatile memory system in the low-power standby mode includes turning off power to portions of the controller.

11. The non-volatile memory system of claim 1, wherein the controller is configured to reset the delay value in response to a command from the host specifying another delay value that is different from the delay value.

12. The non-volatile memory system of claim 11, wherein, in response to receiving the command from the host specifying the another delay value while in the low-power standby mode, the controller is configured to place the non-volatile memory system into the standard mode and subsequently executed the command and reset the value of the delay value with the another delay value.

13. The non-volatile memory system of claim 1 wherein, in response to receiving the second command from the host while in the low-power standby mode, the controller is configured to place the memory system into the standard mode to execute the second command.

14. The non-volatile memory system of claim 11, wherein the command includes an attribute that specifies the type of commands to which the another delay value applies.