Controller, storage device, and computer program product for writing and transfer process

• US 10,366,003 B2
• Filed: 07/20/2016
• Issued: 07/30/2019
• Est. Priority Date: 12/28/2011
• Status: Expired due to Fees

• Current Assignee: Toshiba Memory Corporation (Kioxia Corporation)
• Original Assignee: Toshiba Memory Corporation (Kioxia Corporation)
• Inventors: Fukutomi, Kazuhiro, Kanno, Shinichi, Asano, Shigehiro
• Primary Examiner(s): Yi, David
• Assistant Examiner(s): Goldschmidt, Craig S
• Application Number:
  US15/215,154
• Publication Number:
  US 20170004070A1
• Time in Patent Office: 1,105 Days
• Field of Search: None
• CPC Class Codes: G06F 12/02 Addressing or allocation; Relocation program address sequencing G06F9/00; arrangements for selecting an address in a digital store G11C8/00
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0802 Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
• CPC Class Codes: G06F 12/0859 with reload from main memory
• CPC Class Codes: G06F 12/0868 Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
• CPC Class Codes: G06F 12/0871 Allocation or management of cache space
• CPC Class Codes: G06F 12/0873 Mapping of cache memory to specific storage devices or parts thereof
• CPC Class Codes: G06F 2212/604 Details relating to cache allocation
• CPC Class Codes: G06F 2212/7202 Allocation control and policies
• CPC Class Codes: G06F 2212/7203 Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks

Abstract

According to an embodiment, a controller is connected to an external storage device and controls access to a semiconductor storage device including blocks each including memory cell groups each having memory cells. The block includes pages associated with each memory cell group. A writing process for each memory cell group includes writing stages. The controller includes a determining unit configured to determine data to be transferred to the page required in the writing process for a first memory cell group before the writing stage first starts when the writing stage is performed; a reading unit configured to read the determined data from the semiconductor storage device and to store the read data in the external storage device before the writing stage starts; and a writing unit configured to perform the writing process using the data stored in the external storage device when the writing stage is performed.

Claims

1. A controller that is connected to an external storage device temporarily storing parts of data of a semiconductor storage device, and the controller controls access to the semiconductor storage device, which is configured to include a plurality of blocks, each of the plurality of blocks including N (N is an integer equal to or greater than 2) memory cell groups, each of the memory cell groups having a plurality of memory cells, and each of the plurality of blocks further including that the memory cells in a block are grouped into a plurality of pages, a size of each page of the plurality of pages being a predetermined unit storage area, wherein each of the memory cell groups of the block comprises two or more respective pages of the plurality of the pages, the controller comprising:

processing circuitry configured to;

perform a writing process transferring parts of the data of the semiconductor storage device from one location to another of the semiconductor storage device by transferring the parts of the data to the memory cell groups of a block of the semiconductor storage device, wherein (i) each part of the writing process includes P (P is an integer equal to or greater than

     2) writing stages, the each part of the writing process corresponding to one of the memory cell groups, (ii) the writing stages are performed in a predetermined order, (iii) each writing stage includes at least one destination page, which is in a memory cell group that is a write target of the each writing stage, and (iv), for each of the writing stages, the writing process includes

determining, for a writing stage in which a given memory cell group is the write target of the writing stage, a first part of the data, wherein (i) the first part of the data corresponds to new required pages, (ii) the new required pages include pages required for the writing stage except pages determined to be required for prior writing stages of the writing process, and (iii) the determining of the first part of the data is performed before the writing stage to the given memory cell group starts,

reading the determined first part of the data from source pages of the semiconductor storage device and storing the read data in the external storage device, the reading of the determined first part of the data being performed before the writing stage to the given memory cell group starts,

performing the writing stage to the given memory cell group using the stored data in the external storage device as parts of the data for the pages required in the writing stage in which the given memory cell group is the write target; and

deallocate, after the writing stage is complete, a storage area of the external storage device storing the stored data except for a storage area of the external storage device corresponding to parts of the data for pages that are determined to be required in subsequent writing stages of the writing process, wherein

a capacity of the external storage device is three times or more in size than that of a cell group of the memory cell groups.

2. The controller according to claim 1, wherein the processing circuitry performs the deallocating of the storage area of the external storage device storing the stored data except for a storage area of the external storage device corresponding to parts of the data for pages that are determined to be required in subsequent writing stages of the writing process, before a process of reading data for the pages that are required in the subsequent writing stage starts after the writing stage is completed.

3. The controller according to claim 1, further comprising

a management information storage that stores management information in which a logical address and a physical address of data stored in the semiconductor storage device are associated with each other, wherein

the processing circuitry is configured to update the physical address of the management information associated with the logical address of the determined first part of the data to the physical address indicating a writing position of the data in the page associated with the given memory cell group after the last writing stage of the given memory cell group is completed.

4. The controller according to claim 3, wherein, after the last writing stage of a plurality of given memory cell groups is completed, the processing circuitry updates the physical addresses of pieces of data written in the pages associated with the plurality of given memory cell groups.

5. The controller according to claim 3, wherein the processing circuitry performs an access process to the semiconductor storage device and a process of updating the physical address while appropriately switching the processes.

6. The controller according to claim 3, wherein, when the physical address, which indicates the writing position of the data in the page associated with the memory cell group before the page associated with the given memory cell group is written, is identical to the physical address of the management information associated with the logical address of the data, the processing circuitry updates the physical address of the management information associated with the logical address of the data to the physical address indicating the writing position of the data in the page associated with the given memory cell group.

7. The controller according to claim 1, wherein the processing circuitry is further configured to:

receive a write request to write data to a storage device address which is address information that is converted into the logical address, from an external apparatus; and

perform the writing stage of the memory cell group so that the data corresponding to the write request is written to the page associated with the memory cell group.

8. The controller according to claim 7, wherein a block including the memory cell group to which the processing circuitry writes the data is different from a block including the given memory cell group.

9. The controller according to claim 7, wherein a block including the memory cell group to which the processing circuitry writes the data is the same as a block including the given memory cell group.

10. The controller according to claim 1, wherein the external storage device functions as a temporary buffer for the writing process transferring parts of the data within the semiconductor storage device.

11. A storage device, comprising:

an external storage device configured to store data;

a semiconductor storage device configured to include a plurality of blocks, each of the plurality of blocks including N (N is an integer equal to or greater than

     2) memory cell groups, each of the memory cell groups having a plurality of memory cells, each of the plurality of blocks further including that the memory cells in a block are grouped into, and the semiconductor storage device being configured to output the data in units of a page, which is a predetermined unit storage area, wherein each of the memory cell groups of the block comprises two or more respective pages of the plurality of the pages; and

a controller configured to control access to the data of the semiconductor storage device, and, for a block of the plurality of blocks, the controller controls the access to the data by

writing the data to the block using a writing process, transferring parts of the data from one location to another of the semiconductor storage device by transferring the parts of the data to the memory cell groups of a block, wherein (i) each part of the writing process includes P (P is an integer equal to or greater than

     2) writing stages, the each part of the writing process corresponding to one of the memory cell groups, (ii) the writing stages are performed in a predetermined order, (iii) each writing stage includes at least one destination page, which is in a memory cell group that is a write target of the each writing stage, and (iv), for each of the writing stages, the writing process includes

determining, for a writing stage in which a given memory cell group is the write target of the writing stage, a first part of the data, wherein (i) the first part of the data corresponds to new required pages, and (ii) the new required pages include pages required for the writing stage except pages determined to be required for prior writing stages of the writing process,

reading the determined first part of the data from source pages of the semiconductor storage device and storing the read data in the external storage device, the reading of the determined first part of the data being performed before the writing stage starts,

performing the writing stage to the given memory cell group using the stored data in the external storage device as parts of the data for the pages required in the writing stage in which the given memory cell group is the write target, and

deallocating, after each the writing stage is complete, a storage area of the external storage device storing the stored data except for a storage area of the external storage device corresponding to parts of the data for pages that are determined to be required in subsequent writing stages of the writing process, wherein

a capacity of the external storage device is three times or more in size than that of a cell group of the memory cell groups.

12. A non-transitory computer-readable recording medium containing a program executed by a computer that is connected to an external storage device temporarily storing parts of data of a semiconductor storage device, and the computer controls access to a semiconductor storage device, which is configured to include a plurality of blocks, each of the plurality of blocks including N (N is an integer equal to or greater than 2) memory cell groups, each of the memory cell groups having a plurality of memory cells, and each of the plurality of blocks further including that the memory cells in a block are grouped into the memory cells into a plurality of pages each of which is includes another plurality of memory cells, a size of each page of the plurality of pages being a predetermined unit storage area, wherein each of the memory cell groups of the block comprises two or more respective pages of the plurality of the pages, the program causing the computer to execute:

a writing process transferring parts of the data from one location to another of the semiconductor storage device by transferring the parts of the data to the memory cell groups of a block, wherein (i) each part of the writing process includes P (P is an integer equal to or greater than

     2) writing stages, the each part of the writing process corresponding to one of the memory cell groups, (ii) the writing stages are performed in a predetermined order, (iii) each writing stage includes at least one destination page, which is in a memory cell group that is a write target of the each writing stage, and (iv), for each of the writing stages, the writing process includes

determining, for a writing stage in which a given memory cell group is the write target of the writing stage, a first part of the data, wherein (i) the first part of the data corresponds to new required pages, and (ii) the new required pages include pages required for the writing stage except pages determined to be required for prior writing stages,

reading the determined first part of the data from source pages of the semiconductor storage device,

storing the read data in the external storage device before the writing stage,

performing each of the writing stages of the memory cell group using the data stored in the external storage device as data for the page target pages of the writing stages of the memory cell group when each of the writing stages is performed, and

deallocating, after the writing stage is complete, a storage area of the external storage device storing the stored data except for a storage area of the external storage device corresponding to parts of the data for pages that are determined to be required in subsequent writing stages of the writing process, wherein

a capacity of the external storage device is three times or more in size than that of a cell group of the memory cell groups.

13. A controller that is controls access to a first storage device, which is configured to include a plurality of blocks, each of the plurality of blocks including N (N is an integer equal to or greater than 2) memory cell groups, each of the memory cell groups having a plurality of memory cells, and each of the plurality of blocks further including that the memory cells in a block are grouped into a plurality of pages, a size of each page of the plurality of pages being a predetermined unit storage area, each of the memory cell groups being associated with two or more respective pages of the plurality of the pages, the controller comprising:

processing circuitry configured to

perform a writing process transferring parts of the data of the first storage device from one location to another of the first storage device by transferring the parts of the data to for each of the memory cell groups of a block of the first storage device, wherein (i) each part of the writing process includes P (P is an integer equal to or greater than

     2) writing stages, the each part of the writing process corresponding to one of the memory cell groups, (ii) the writing stages being performed in a predetermined order, (iii) each writing stage includes at least one destination page, which is in a memory cell group that is a write target of the each writing stage, and (iv), for each of the writing stages being performed by

determining, for a writing stage in which a given memory cell group is the write target of the writing stage, a first part of the data, wherein (i) the first part of the data corresponds to new required pages, and (ii) the new required pages include pages required for the writing stage except pages determined to be required for prior writing stages of the writing process,

reading the determined first part of the data from the first storage device and storing the read data in a second storage device, the reading of the determined first part of the data being performed before the writing stage to the given memory cell group starts,

performing each of the writing stage to stages using the stored data in the second storage device as parts of the data for the pages required in the writing stage; and

deallocating, after the writing stage is complete, a storage area of the second storage device storing the stored data except for a storage area of the second storage device corresponding to parts of the data for pages that are determined to be required in subsequent writing stages of the writing process, wherein

a capacity of the second storage device is three times or more in size than that of a cell group of the memory cell.

14. The controller according to claim 13, wherein when a subsequent writing stage requires the data stored in the storage area, the processing circuitry delays a deallocation of the storage area until the subsequent writing stage is completed.

15. The controller according to claim 14, wherein when the storage area of the second storage device storing the first part of the determined data is not deallocated, the processing circuitry does not read, during the subsequent writing stages, the determined first part of the data from the first storage device.