Dry plasma etch method to pattern MRAM stack

• US 10,374,144 B2
• Filed: 09/28/2017
• Issued: 08/06/2019
• Est. Priority Date: 04/20/2015
• Status: Active Grant

• Current Assignee: Lam Research Corporation
• Original Assignee: Lam Research Corporation
• Inventors: Tan, Samantha, Kim, Taeseung, Yang, Wenbing, Marks, Jeffrey, Lill, Thorsten
• Primary Examiner(s): Olsen, Allan W.
• Application Number:
  US15/719,497
• Publication Number:
  US 20180019387A1
• Time in Patent Office: 677 Days
• Field of Search: None
• CPC Class Codes: C23F 1/12 Gaseous compositions
• CPC Class Codes: C23F 4/00 Processes for removing metallic material from surfaces, not provided for in group C23F1/00 or C23F3/00
• CPC Class Codes: H01J 37/32082 Radio frequency generated discharge H01J37/32357, H01J37/32366, H01J37/32394 and H01J37/32403 take precedence
• CPC Class Codes: H01J 37/32422 Arrangement for selecting ions or species in the plasma
• CPC Class Codes: H01J 37/32651 Shields, e.g. dark space shields, Faraday shields
• CPC Class Codes: H10B 61/00 Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
• CPC Class Codes: H10N 35/01 Manufacture or treatment
• CPC Class Codes: H10N 50/01 Manufacture or treatment

Abstract

Methods of etching metal by depositing a material reactive with a metal to be etched and a halogen to form a volatile species and exposing the substrate to a halogen-containing gas and activation gas to etch the substrate are provided. Deposited materials may include silicon, germanium, titanium, carbon, tin, and combinations thereof. Methods are suitable for fabricating MRAM structures and may involve integrating ALD and ALE processes without breaking vacuum.

Claims

1. A method comprising:

(a) providing a substrate comprising two or more metal layers, a free layer, a dielectric barrier layer, and a fixed layer, wherein the dielectric barrier layer is between the free layer and the fixed layer, and wherein the free layer, the dielectric barrier layer, and the fixed layer are between the two or more metal layers,

(b) exposing the substrate to a silicon-containing gas and a reducing agent to deposit a silicon-containing material on the substrate,

(c) exposing the substrate to a halogen-containing gas for a duration sufficient to substantially saturate a surface of the substrate, and

(d) exposing the substrate to an activation gas to etch the substrate.

2. The method of claim 1, further comprising:

repeating (b) after substantially all of the free layer is etched and before the dielectric barrier layer is exposed,

etching the dielectric barrier layer with a halogen-free chemistry, and

repeating (c) and (d) to etch the substrate after the dielectric barrier layer is etched.

3. The method of claim 1, wherein the halogen-containing gas is selected from the group consisting of Cl₂, BCl₃, BBr₃, BI₃, F₂, BF₃, Br₂, I₂ and combinations thereof.

4. The method of claim 1, wherein (c) and (d) are repeated in two or more cycles.

5. The method of claim 1, wherein (a)-(d) are performed without breaking vacuum.

6. The method of claim 1, wherein (b) mitigates re-deposition of metal-containing byproducts.

7. The method of claim 1, wherein the silicon-containing material is reactive with both the halogen-containing gas and a metal material of at least one of the two or more metal layers of the substrate selected from the group consisting of Period IV transition metals, Period V transition metals, Period VI transition metals, and combinations thereof.

8. The method of claim 7, wherein the metal material of the at least one of the two or more metal layers selected from the group consisting of Period IV transition metals, Period V transition metals, Period VI transition metals, and combinations thereof and the dielectric barrier layer are adjacent layers on the substrate.

9. The method of claim 1, wherein the silicon-containing material is selected from the group consisting of is silicon nitride, silicon oxide and silicon.

10. The method of claim 1, wherein the silicon-containing material is deposited by a self-limiting reaction.

11. The method of claim 1, wherein the silicon-containing material remains on sidewalls of features of the substrate during (d).

12. The method of claim 1, wherein the silicon-containing material protects at least one of the two or more metal layers of the substrate during (d).

13. The method of claim 1, further comprising applying a bias during (d) at a power less than about 100 Vb.

14. The method of claim 1, wherein (d) comprises activating the activation gas using one of plasma, ion-beam etching, and thermal activation.

15. A method comprising:

(a) providing a substrate comprising two or more metal layers, a free layer, a dielectric barrier layer, and a fixed layer, wherein the dielectric barrier layer is between the free layer and the fixed layer, and the free layer, the dielectric barrier layer, and the fixed layer are between the two or more metal layers,

(b) exposing the substrate to a precursor gas and a reducing agent to deposit a material selected from the group consisting of silicon-containing material, titanium-containing material, germanium-containing material, tin-containing material, carbon-containing material, and combinations thereof on the substrate,

(c) exposing the substrate to a halogen-containing gas for a duration sufficient to substantially saturate a surface of the substrate, and

(d) exposing the substrate to an activation gas to etch the substrate.

16. The method of claim 15, wherein the material is the titanium-containing material and is selected from the group consisting of titanium oxide or titanium nitride.