Semiconductor light emitting device having a recess with irregularities

• US 10,381,516 B2
• Filed: 07/21/2016
• Issued: 08/13/2019
• Est. Priority Date: 09/19/2008
• Status: Active Grant

• Current Assignee: Nichia Corporation
• Original Assignee: Nichia Corporation
• Inventors: Wakai, Yohei, Onishi, Masahiko
• Primary Examiner(s): Chen, David
• Application Number:
  US15/216,402
• Publication Number:
  US 20160329465A1
• Time in Patent Office: 1,118 Days
• Field of Search: 257 79, 257 94, 257 95, 257 98, 257 99, 257103, 257E33005, 257E33068, 257E33074
• CPC Class Codes: H01L 2933/0083 Periodic patterns for optical field-shaping in or on the semiconductor body or semiconductor body package, e.g. photonic bandgap structures
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/145 with a current-blocking structure
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers
• CPC Class Codes: H01L 33/24 of the light emitting region, e.g. non-planar junction
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/58 Optical field-shaping elements

Abstract

A semiconductor light emitting device which includes at least one concave on a light extraction surface opposite to a surface on which a semiconductor stack comprising a light emitting layer between a n-type semiconductor layer and a p-type semiconductor layer is mounted. The concave has not less than two slopes each having a different slope angle in a direction that a diameter of the concave becomes narrower toward a bottom of the concave from an opening of the concave and a slope having a gentle slope angle is provided with irregularities and a slope having a steep slope angle is a flat surface.

Claims

1. A semiconductor light emitting device comprising:

a substrate;

a semiconductor stack including a p-type semiconductor layer, a light emitting layer, and an n-type semiconductor layer in this order above the substrate;

a first passivation film comprising an insulating material and disposed on at least a part of the semiconductor stack;

a metallization layer disposed between the substrate and the first passivation film;

a second passivation film comprising an insulating material and disposed between the p-type semiconductor layer and the metallization layer;

a plurality of n-electrodes disposed on the n-type semiconductor layer; and

a p-electrode disposed between the p-type semiconductor layer and the metallization layer,

wherein the n-type semiconductor layer defines at least one recess and has a light extraction surface defining an opening of the recess,

wherein the recess has two slopes, the two slopes having different slope angles in a direction along which a diameter of the recess becomes narrower toward a bottom of the recess from the opening of the recess,

wherein the two slopes include a first slope and a second slope, the first slope having a slope angle gentler than a slope angle of the second slope, and a surface of the second slope being less irregular than a surface of the first slope,

wherein the first passivation film, continuously covers the recess and lateral surfaces of the semiconductor stack, and

wherein, in a cross-sectional view, portions of the second passivation film are disposed alternately with portions of the p-electrode.

2. The semiconductor light emitting device according to claim 1,

wherein the first slope of the recess is closer to the opening of the recess than the second slope.

3. The semiconductor light emitting device according to claim 1,

wherein the recess has a bottom surface at the bottom and the bottom surface is provided with irregularities.

4. The semiconductor light emitting device according to claim 1,

wherein a plurality of the recesses are disposed on the light extraction surface,

wherein adjacent openings of the plurality of the recesses are separated from each other by a separating area, and

wherein the separating area is provided with irregularities.

5. The semiconductor light emitting device according to claim 1, wherein the plurality of n-electrodes are disposed on the light extraction surface.

6. The semiconductor light emitting device according to claim 1,

wherein a shape of the opening of the recess is a circle in plan view from the light extraction surface.

7. The semiconductor light emitting device according to claim 1, wherein a shape of the opening of the recess is a polygon in plan view from the light extraction surface.

8. The semiconductor light emitting device according to claim 1, wherein a shape of the opening of the recess is a hexagon in plan view from the light extraction surface.

9. The semiconductor light emitting device according to claim 1,

wherein at least one of the first slope and the second slope of the recess is covered with the first passivation film.

10. The semiconductor light emitting device according to claim 1,

wherein the recess is disposed at a position facing the p-electrode.

11. The semiconductor light emitting device according to claim 4,

wherein the first slope of each of the recesses is closer to the opening of each of the recesses than the second slope.

12. The semiconductor light emitting device according to claim 4,

wherein each of the recesses has a bottom surface at the bottom and the bottom surface is provided with irregularities.

13. The semiconductor light emitting device according to claim 4, wherein the plurality of n-electrodes are disposed on the light extraction surface.

14. The semiconductor light emitting device according to claim 4,

wherein a shape of the opening of each of the recesses is a circle in plan view from the light extraction surface.

15. A semiconductor light emitting device comprising:

a substrate;

a semiconductor stack including a p-type semiconductor layer, a light emitting layer, and an n-type semiconductor layer in this order above the substrate, the n-type semiconductor layer defines recesses and has a light extraction surface that defines an opening of each of the recesses; and

an n-electrode disposed on the light extraction surface in a region between openings of adjacent two of the recesses,

wherein each of the recesses is defined by a bottom surface and two slopes, each of the two slopes having a different slope angle in a direction along which a diameter of each of the recesses becomes narrower toward the bottom surface from the opening,

wherein the two slopes include a first slope and a second slope, the first slope having a slope angle gentler than the second slope, and a surface of the second slope being less irregular than a surface of the first slope,

wherein a depth of each of the recesses has a length not less than a half of a thickness between the light extraction surface and the light emitting layer and less than the thickness between the light extraction surface and the light emitting layer, and

wherein irregularities are provided on a portion of the light extraction surface, and the n-electrode is disposed on the micro irregularities.

16. The semiconductor light emitting device according to claim 15,

wherein the first slope of each of the recesses is closer to the opening of the respective recess than the second slope.

17. The semiconductor light emitting device according to claim 15,

wherein the bottom surface is provided with irregularities.

18. The semiconductor light emitting device according to claim 15,

wherein a shape of the opening of each of the recesses is a circle in plan view from the light extraction surface.

19. The semiconductor light emitting device according to claim 15,

wherein the semiconductor stack has a higher planar portion outside the recesses and a lower planar portion inside the recesses, and

wherein the two slopes connect the higher planar portion and the lower planar portion.

20. The semiconductor light emitting device according to claim 15,

wherein the recesses are exposed to an outside of the semiconductor light emitting device.

21. The semiconductor light emitting device according to claim 19,

wherein the plurality of the recesses are disposed on the light extraction surface,

wherein adjacent openings of the plurality of the recesses are separated from each other,

wherein a separating area which separates the adjacent openings is provided with irregularities, and wherein the separating area comprises the higher planar portion.

22. A semiconductor light emitting device comprising:

a substrate;

a semiconductor stack including a p-type semiconductor layer, a light emitting layer, and an n-type semiconductor layer in this order above the substrate,

wherein the n-type semiconductor layer defines a plurality of recesses and has a light extraction surface that defines an opening of each of the recesses;

a plurality of n-electrodes disposed on the light extraction surface, wherein each of the plurality of n-electrodes is disposed in a region between openings of adjacent two of the plurality of recesses,

wherein each of the plurality of recesses includes a bottom surface and a sloped surface;

a first passivation film comprising an insulating material and disposed on at least a part of the semiconductor stack;

a metallization layer disposed between the substrate and the first passivation film;

a second passivation film comprising an insulating material and disposed between the p-type semiconductor layer and the metallization layer; and

a p-electrode disposed between the p-type semiconductor layer and the metallization layer,

wherein a diameter of each of the plurality of recesses becomes narrower toward the bottom surface from the opening,

wherein the bottom surface of each of the recesses and the region between the openings of the plurality of recesses have irregularities, and

wherein the plurality of recesses are located from an outermost side of each of the plurality of n-electrodes to lateral surfaces of the semiconductor stack in a cross-sectional side view of the semiconductor light emitting device.

23. The semiconductor light emitting device according to claim 22,

wherein the first passivation film is arranged on the light extraction surface so as to cover the recesses.

24. The semiconductor light emitting device according to claim 22,

wherein a shape of the opening of each of the recesses is a circle in plan view from the light extraction surface.

25. The semiconductor light emitting device according to claim 22, wherein a shape of the opening of each of the recesses is a polygon in plan view from the light extraction surface.

26. The semiconductor light emitting device according to claim 22, wherein a shape of the opening of each of the recesses is a hexagon in plan view from the light extraction surface.

27. The semiconductor light emitting device according to claim 22,

wherein a depth of the recesses has a length not less than half of a thickness between the light extraction surface and the light emitting layer and less than the thickness between the light extraction surface and the light emitting layer.