Non-volatile storage system with compute engine to accelerate big data applications
First Claim
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1. A non-volatile storage system, comprising:
- a controller; and
a memory die, the memory die includes;
a substrate;
a monolithic three dimensional non-volatile memory structure in which multiple memory levels are formed as part of the memory die above the substrate with no intervening substrates between the memory levels;
a compute engine configured to perform data manipulation operations on contents of data stored in the memory structure, andan error correction engine, the compute engine and the error correction engine are implemented on a top surface of the substrate and below the memory structure of the memory die.
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Abstract
A memory system (e.g. a solid state drive) includes one or more non-volatile memory die, a controller in communication with the memory die and a compute engine inside the memory system that is near the location of the data and can be used to perform common data manipulation operations.
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Citations
25 Claims
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1. A non-volatile storage system, comprising:
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a controller; and a memory die, the memory die includes; a substrate; a monolithic three dimensional non-volatile memory structure in which multiple memory levels are formed as part of the memory die above the substrate with no intervening substrates between the memory levels; a compute engine configured to perform data manipulation operations on contents of data stored in the memory structure, and an error correction engine, the compute engine and the error correction engine are implemented on a top surface of the substrate and below the memory structure of the memory die. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A non-volatile storage system, comprising:
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a front end processor circuit configured to communicate with a host and perform logical to physical address translation; a first back end processor circuit connected to the front end processor circuit; a second back end processor circuit connected to the front end processor circuit; a plurality of memory dies comprising a first set of memory dies connected to the first back end processor circuit via a first physical interface and a second set of memory dies connected to the second back end processor circuit via a second physical interface; and a compute engine inside the non-volatile storage system and in communication with the front end processor circuit, the compute engine is configured to perform operations on data stored in the plurality of memory dies. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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21. A non-volatile storage system, comprising:
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a local volatile memory; a front end processor circuit connected to the local volatile memory, the front end processor circuit includes a first processor, the front end processor circuit is configured to communicate with a host and manage the local volatile memory; a first back end processor circuit connected to the front end processor circuit, the first back end processor circuit comprising a second processor separate from the first processor; a second back end processor circuit connected to the front end processor circuit, the second back end processor circuit comprising a third processor separate from the first processor and the second processor; non-volatile memory including a first subset of the non-volatile memory connected to the first back end processor circuit and a second subset of the non-volatile memory connected to the second back end processor circuit; and a compute engine inside the non-volatile storage system and in communication with the local volatile memory and the front end processor circuit, the compute engine is configured to perform operations on data stored in the non-volatile memory using the local volatile memory. - View Dependent Claims (22, 23, 24, 25)
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Specification