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Circuit and method for managing access to memory

  • US 10,387,334 B2
  • Filed: 10/30/2017
  • Issued: 08/20/2019
  • Est. Priority Date: 03/29/2017
  • Status: Active Grant
First Claim
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1. An interface circuit configured to manage operations for accessing a flash memory requested by a main processing unit and by an auxiliary processing unit, the interface circuit comprising:

  • a first register block couplable to the main processing unit and configured to store requests for accessing the flash memory coming from the main processing unit;

    a second register block couplable to the auxiliary processing unit and configured to store respective requests for accessing the flash memory coming from the auxiliary processing unit; and

    a conflict management circuit coupled to the first register block and to the second register block for receiving requests for accessing the flash memory, the conflict management circuit comprising a support memory configured for storing programming and erase subroutines for the flash memory and a programmable controller coupled to the support memory and controllable for programming or erasing blocks of the flash memory by executing the programming or erase subroutine, wherein, associated with the access requests coming from the main processing unit, in at least one operating condition, a first access priority to the flash memory different from a second access priority to the flash memory associated with the access requests coming from the auxiliary processing unit, the conflict management circuit being configured for;

    following a receipt of a first access request for accessing the flash memory by one of the main processing unit and the auxiliary processing unit, and in an absence of further requests for accessing the flash memory, command the access to the flash memory for the main processing unit or the auxiliary processing unit which has initiated the first access request;

    following a receipt of a second access request for accessing the flash memory from the other of the main processing unit and the auxiliary processing unit, during the access to the flash memory of the main processing unit or the auxiliary processing unit which has initiated the first access request, compare an access priority associated with the first access request with an access priority associated with the second access request;

    based on a result of the comparison, suspending one of the first access request or the second access request; and

    authorizing the other of the first access request or the second access request.

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