USB port controller with automatic transmit retries and receive acknowledgements

• US 10,387,345 B2
• Filed: 10/11/2017
• Issued: 08/20/2019
• Est. Priority Date: 10/23/2014
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Waters, Deric Wayne
• Primary Examiner(s): Abad, Farley
• Application Number:
  US15/729,751
• Publication Number:
  US 20180046591A1
• Time in Patent Office: 678 Days
• CPC Class Codes: G06F 1/266 Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
• CPC Class Codes: G06F 13/362 with centralised access control
• CPC Class Codes: G06F 13/4068 Electrical coupling
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247

Abstract

Described examples include USB controllers and methods of interfacing a host processor with one or more USB ports with the host processor implementing an upper protocol layer and a policy engine for negotiating USB power delivery parameters, in which the USB controller includes a logic circuit implementing a lower protocol layer to provide automatic outgoing data transmission retries independent of the upper protocol layer of the host processor. The controller logic circuit further implements automatic incoming data packet validity verification and acknowledgment independent of the upper protocol layer of the host processor.

Claims

1. A universal serial bus (USB) controller, comprising:

a USB power connector adapted to be coupled to a USB compatible device, the USB power connector configured to selectively transfer power between the USB controller and the USB compatible device;

a transceiver adapted to be coupled to the USB compatible device, the transceiver configured to selectively transfer data between the USB controller and the USB compatible device; and

a logic circuit coupled to the transceiver, and adapted to be coupled to a host processor, the logic circuit configured to;

implement a lower protocol layer to interface the transceiver with an upper protocol layer of the host processor;

receive a transmit control message from the upper protocol layer, the transmit control message specifying an outgoing packet type and an integer number K retries to transmit outgoing packet data from the upper protocol layer to the USB compatible device;

transmit an outgoing packet, according to the desired outgoing packet type specified in the transmit control message and including the outgoing packet data, from the upper protocol layer to the USB compatible device via the transceiver;

automatically retransmit the outgoing packet up to K times independent of the upper protocol layer, if no acknowledgement of receipt of the outgoing packet by the USB compatible device is received by the transceiver in a time period; and

send a transmit failure message to the host processor if no acknowledgement of receipt of the outgoing packet by the USB compatible device is received by the USB controller after K retries.

2. The USB controller of claim 1, wherein the logic circuit is configured to:

receive an incoming packet from the USB compatible device via the transceiver; and

if the incoming packet is valid, automatically send an acknowledgment to the USB compatible device independent of the upper protocol layer, the acknowledgement indicating receipt of the incoming packet.

3. The USB controller of claim 2, wherein the logic circuit is configured to send the incoming packet to the upper protocol layer after sending the acknowledgment if the incoming packet is valid.

4. The USB controller of claim 1, wherein the logic circuit includes a serial communications connection configured to transfer control and data messages between the USB controller and the host processor.

5. The USB controller of claim 1, further comprising a power control circuit configured to control power transfer between the USB controller and the USB compatible device.

6. A method of interfacing a host processor with a USB port using a USB controller, the method comprising:

receiving, in the USB controller, a transmit control message from an upper protocol layer of the host processor, the transmit control message specifying an outgoing packet type and an integer number K retries for transmitting outgoing packet data from an upper protocol layer of the host processor to a USB compatible device;

transmitting an outgoing packet including the outgoing packet data according to the outgoing packet type specified in the transmit control message, from the USB controller to a USB communications line;

if no acknowledgement of receipt of the outgoing packet by the USB compatible device is received by the USB controller in a time period, automatically retransmitting the outgoing packet from the USB controller to the USB communications line up to K times independent of the host processor; and

if no acknowledgement of receipt of the outgoing packet by the USB compatible device is received by the USB controller after K retries, sending a transmit failure message from the USB controller to the host processor.

7. The method of claim 6, further comprising:

receiving an incoming packet from the USB communications line;

automatically determining, independent of the host processor, whether the incoming packet is valid; and

if the incoming packet is valid, automatically sending an acknowledgment to the USB communications line independent of the host processor, the acnkowledgement indicating receipt of the incoming packet.