NFC cryptographic security module

• US 10,387,689 B2
• Filed: 10/12/2017
• Issued: 08/20/2019
• Est. Priority Date: 09/22/2017
• Status: Expired due to Fees

• Current Assignee: Tocreo Labs LLC
• Original Assignee: Tocreo Labs LLC
• Inventors: Krawczewicz, Mark Stanley, Schaeffer, Richard C., Rose, Kenneth Hugh, Krawczewicz, Thomas J.
• Primary Examiner(s): Hirl, Joseph P
• Assistant Examiner(s): Murphy, J. Brant
• Application Number:
  US15/730,929
• Publication Number:
  US 20190095655A1
• Time in Patent Office: 677 Days
• CPC Class Codes: G06F 21/77 in smart cards
• CPC Class Codes: G06F 21/85 interconnection devices, e.g. bus-connected or in-line devices
• CPC Class Codes: H04B 5/77 for interrogation
• CPC Class Codes: H04L 2209/805 Lightweight hardware, e.g. radio-frequency identification [RFID] or sensor
• CPC Class Codes: H04L 63/0853 using an additional device, e.g. smartcard, SIM or a different communication terminal cryptographic mechanisms or cryptographic arrangements for entity authentication involving additional secure or trusted devices H04L9/3234
• CPC Class Codes: H04L 9/0822 using key encryption key
• CPC Class Codes: H04L 9/0877 using additional device, e.g. trusted platform module [TPM], smartcard, USB or hardware security module [HSM]
• CPC Class Codes: H04L 9/32 including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
• CPC Class Codes: H04L 9/3231 Biological data, e.g. fingerprint, voice or retina network architectures or network communication protocols for supporting authentication of entities using biometrical features in a packet data network H04L63/0861
• CPC Class Codes: H04L 9/3234 involving additional secure or trusted devices, e.g. TPM, smartcard, USB or software token network architectures or network communication protocols for supporting authentication of entities using an additional device in a packet data network H04L63/0853
• CPC Class Codes: H04L 9/3247 involving digital signatures
• CPC Class Codes: H04L 9/3249 using RSA or related signature schemes, e.g. Rabin scheme
• CPC Class Codes: H04W 12/06 Authentication
• CPC Class Codes: H04W 4/10 Push-to-Talk [PTT] or Push-On-Call services
• CPC Class Codes: H04W 4/70 Services for machine-to-machine communication [M2M] or machine type communication [MTC]
• CPC Class Codes: H04W 4/80 Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication
• CPC Class Codes: H04W 4/90 Services for handling of emergency or hazardous situations, e.g. earthquake and tsunami warning systems [ETWS]

Abstract

A cryptographic security token having a secure microprocessor, a secure bus connected to said secure microprocessor, a bus isolation microcontroller connected to said secure bus wherein said bus isolation microcontroller comprises firmware for controlling communications through said secure bus to said secure microprocessor, a first NFC antenna connected to said bus isolation microcontroller, and a second NFC antenna connected to said secure microprocessor. The secure microprocessor and said bus isolation microprocessor are powered by energy received through said first NFC antenna and said second NFC antenna. The cryptographic security token receives data from outside said cryptographic security token only through said first NFC antenna. The token or module may further have a bi-state or bi-stable display and a secure memory, each connected to the secure microprocessor by a secure bus.

Claims

1. A cryptographic security token comprising:

a secure microprocessor;

a secure bus connected to said secure microprocessor;

a bus isolation microcontroller connected to said secure bus, said bus isolation microcontroller comprising firmware configued to securely control communications through said secure bus to said secure microprocessor;

a first NFC antenna connected to said bus isolation microcontroller; and

a second NFC antenna connected only to said secure microprocessor;

wherein said bus isolation microprocessor is powered by energy received through said first NFC antenna and said secure microprocessor is powered by energy received through said second NFC antenna; and

wherein said cryptographic security token receives data from outside said cryptographic security token only through said first NFC antenna and data communication through said second NFC antenna is disabled when said cryptographic module is powered up.

2. A cryptographic security token according to claim 1, further comprising:

a display, wherein said display comprises one of a bi-state display and a bi-stable display; and

a second secure bus between the display and the secure microprocessor, wherein the second secure bus has fully programmable irreversible bit mapping of an order between a least significant bit and a most significant bit within an data address and provides unique data addressing of data being transmitted from the secure processor to the display.

3. A cryptographic security token according to claim 2, where said irreversible bit mapping comprises fusible links.

4. A cryptographic security token according to claim 1, further comprising:

a secure memory; and

a second secure bus between the secure memory and the secure microprocessor, wherein the second secure bus has fully programmable irreversible bit mapping of an order between a least significant bit and a most significant bit within an data address and provides unique data addressing of data being transmitted from the secure processor to the display.

5. A cryptographic security token according to claim 1, further comprising:

a display, wherein said display comprises one of a bi-state display and a bi-stable display;

a second secure bus between the display and the secure microprocessor, wherein the second secure bus has fully programmable irreversible bit mapping of an order between a least significant bit and a most significant bit within an data address and provides unique data addressing of data being transmitted from the secure processor to the display and has fully programmable bit mapping of an order between a least significant bit and a most significant bit within a data word and provides unique bit mapping of data being transmitted from the secure processor to the display;

a secure memory; and

a third secure bus between the secure and the secure microprocessor, wherein the second secure bus has fully programmable irreversible bit mapping of an order between a least significant bit and a most significant bit within an data address and provides unique data addressing of data being transmitted from the secure processor to the display and has fully programmable irreversible bit mapping of an order between a least significant bit and a most significant bit within a data word and provides unique bit mapping of data being transmitted from the secure processor to the display.

6. A cryptographic security token according to claim 1 further comprising energy harvesters connected to said first and said second NFC antennas.

7. A cryptographic security token according to claim 6, wherein said conformal layer comprises:

an ultraviolet epoxy; and

a compound for preventing removal of the conformal layer with acid or etching techniques without damaging any portion of the underlying printed circuit board.

8. A cryptographic security token according to claim 7, wherein said compound comprises one or more shielding components selected from the group of ground metal compounds, graphene, carbon nanotubes, synthetic diamond and quantum dots.

9. A cryptographic security token according to claim 7, further comprising:

a UV cured adhesive material over said conformal coating.

10. A cryptographic security token according to claim 7 further comprising a waterproof synthetic printing medium over said UV cured adhesive material, wherein polyolefin hydrophilic properties of the waterproof synthetic printing medium are custom infused with micro-taggants that fluoresce or leach die when probed.

11. A cryptographic security token according to claim 1, wherein said secure microprocessor, said secure bus, and said bus isolation microcontroller are formed on a thin film printed circuit board.

12. A cryptographic security token according to claim 11, further comprising:

an epoxy-based conformal coating over said thin film printed circuit board.

13. A cryptographic security token according to claim 12, wherein said conformal layer has properties that block probing using X-rays, focused electron and ion beam scanning and scanning electron microscopy.

14. A cryptographic security token according to claim 11, further comprising:

a conformal layer comprising;

a potting material comprising at least one material selected from the group of urethane, epoxy and ceramic;

a compound mixed within said potting material;

a mineral; and

an anti-tamper film embedded within said potting material.

15. A cryptographic security token according to claim 14, wherein said compound comprises one or more of metals, heavy metals, graphone, carbon, carbon fullerene structures, synthetic diamond dust and quantum dots.

16. A cryptographic security token according to claim 14, wherein said anti-tamper film comprises an active or passive anti-tamper mesh film.

17. A cryptographic security token according to claim 1 wherein said security token is the in the form of a card.

18. A cryptographic security token according to claim 1, further comprising:

a voltage glitch detector for detecting power pulses in said security token.

19. A cryptographic security token according to claim 18, wherein said voltage glitch detector comprises a comparator connected to a power bus in said cryptographic security token and to a reference voltage.

20. A cryptographic security token according to claim 1, further comprising:

a secure memory; and

an over/under temperature sensor and detector circuit for monitoring a temperature of said secure memory.