Method and system for driving a light emitting device display

• US 10,388,221 B2
• Filed: 09/27/2017
• Issued: 08/20/2019
• Est. Priority Date: 06/08/2005
• Status: Active Grant

• Current Assignee: IGNIS Innovation Incorporated
• Original Assignee: IGNIS Innovation Incorporated
• Inventors: Nathan, Arokia, Chaji, Gholamreza
• Primary Examiner(s): Ghebretinsae, Temesghen
• Assistant Examiner(s): Abebe, Sosina
• Application Number:
  US15/717,043
• Publication Number:
  US 20180018919A1
• Time in Patent Office: 692 Days
• CPC Class Codes: G09G 2300/043 Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0852 being a dynamic memory with more than one capacitor
• CPC Class Codes: G09G 2310/0216 Interleaved control phases for different scan lines in the same sub-field, e.g. initialization, addressing and sustaining in plasma displays that are not simultaneous for all scan lines
• CPC Class Codes: G09G 2310/0218 with collection of electrodes in groups for n-dimensional addressing
• CPC Class Codes: G09G 2310/0221 with use of split matrices G09G3/3644 and G09G3/3666 take precedence
• CPC Class Codes: G09G 2310/0283 Arrangement of drivers for different directions of scanning
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2320/045 Compensation of drifts in the characteristics of light emitting or modulating elements
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3258 with pixel circuitry controlling the voltage across the light-emitting element

Abstract

A method and system for driving a light emitting device display is provided. The system provides a timing schedule which increases accuracy in the display. The system may provide the timing schedule by which an operation cycle is implemented consecutively in a group of rows. The system may provide the timing schedule by which an aging factor is used for a plurality of frames.

Claims

1. A method of driving a display system using a segmented addressing scheme, the display system comprising an array of pixel circuits divided into a plurality of segments driven according to the segmented addressing scheme, each of the plurality of segments including pixel circuits in more than one row of the array, each pixel circuit having a light emitting device, a drive transistor for driving the light emitting device to emit light, a capacitor, and a switch transistor for generating a threshold voltage of the drive transistor during a generating threshold voltage operation, the method comprising:

simultaneously controlling the switch transistors in a plurality of pixel circuits in more than one row in a first segment of the plurality of segments of the array with shared control signals, to simultaneously generate the threshold voltages of the drive transistors in the plurality of pixel circuits in the first segment during the generating threshold voltage operation for the plurality of pixel circuits in the first segment, while controlling switch transistors of every pixel circuit of every segment of the plurality of segments other than the first segment to not generate threshold voltages.

2. A method as claimed in claim 1, wherein each segment includes a plurality of rows, the simultaneously controlling the switch transistors being executed consecutively for each segment in the plurality of segments.

3. A method as claimed in claim 1, further comprising:

subsequently implementing simultaneously controlling the switch transistors of the first segment, after the simultaneously controlling the switch transistors is carried out in a second segment.

4. A display system comprising:

an array of pixel circuits divided into a plurality of segments, each of the plurality of segments driven according to a segmented addressing scheme, each of the plurality of segments including pixel circuits in more than one row of the array, each pixel circuit having a light emitting device, a drive transistor for driving the light emitting device to emit light, a capacitor, and a switch transistor for generating a threshold voltage of the drive transistor during a generating threshold voltage operation; and

a driver configured to implement the segmented addressing scheme using the plurality of segments including simultaneously controlling the switch transistors in a plurality of pixel circuits in more than one row in a first segment of the plurality of segments of the array with shared control signals, to simultaneously generate the threshold voltages of the drive transistors in the plurality of pixel circuits in the first segment during the generating threshold voltage operation for the plurality of pixel circuits in the first segment, while controlling switch transistors of every pixel circuit of every segment of the plurality of segments other than the first segment to not generate threshold voltages.

5. A display system as claimed in claim 4, wherein each segment includes a plurality of rows, the driver configured to simultaneously control the switch transistors consecutively for each segment in the plurality of segments.

6. A display system as claimed in claim 4, wherein the driver is further configured to simultaneously control the switch transistors of the first segment, after simultaneously controlling the switch transistors in a second segment.