Semiconductor device

• US 10,388,670 B2
• Filed: 03/02/2017
• Issued: 08/20/2019
• Est. Priority Date: 04/29/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Ieda, Yoshinori, Isobe, Atsuo, Shionoiri, Yutaka, Atsumi, Tomoaki
• Primary Examiner(s): Swanson, Walter H
• Application Number:
  US15/447,672
• Publication Number:
  US 20170179132A1
• Time in Patent Office: 901 Days
• CPC Class Codes: H01L 27/092 complementary MIS field-effect transistors
• CPC Class Codes: H01L 27/105 including field-effect components
• CPC Class Codes: H01L 27/1207 combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H01L 28/40 Capacitors
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/16 including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10B 12/30 DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
• CPC Class Codes: H10B 41/20 characterised by three-dimensional arrangements, e.g. with cells on different height levels
• CPC Class Codes: H10B 41/70 the floating gate being an electrode shared by two or more components
• CPC Class Codes: H10B 69/00 Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
• CPC Class Codes: H10B 99/00 Subject matter not provided for in other groups of this subclass

Abstract

Provided is a semiconductor device which has low power consumption and can operate at high speed. The semiconductor device includes a memory element including a first transistor including crystalline silicon in a channel formation region, a capacitor for storing data of the memory element, and a second transistor which is a switching element for controlling supply, storage, and release of charge in the capacitor. The second transistor is provided over an insulating film covering the first transistor. The first and second transistors have a source electrode or a drain electrode in common.

Claims

1. A semiconductor device comprising:

a substrate;

a first transistor over the substrate, the first transistor comprising;

a first semiconductor body comprising silicon having crystallinity or germanium having crystallinity;

a first gate electrode overlapping the first semiconductor body;

a first gate insulating film between the first semiconductor body and the first gate electrode; and

a first source electrode and a first drain electrode electrically connected to the first semiconductor body;

a first insulating film over the first semiconductor body, the first gate electrode, and the first gate insulating film; and

a second transistor comprising;

a back gate electrode over the first insulating film;

an oxide semiconductor film over the back gate electrode;

a second gate electrode overlapping the oxide semiconductor film;

a second gate insulating layer between the oxide semiconductor film and the second gate electrode;

a second source electrode and a second drain electrode each in electric contact with the oxide semiconductor film; and

a side wall in direct contact with the second gate electrode,

wherein the oxide semiconductor film overlaps with the back gate electrode and the second gate electrode.

2. The semiconductor device according to claim 1, further comprising:

a fourth insulating film comprising a projection, a top surface of the projection being in direct contact with a bottom surface of the oxide semiconductor film; and

a fifth insulating film on the fourth insulating film and around the projection,

wherein the back gate electrode is under the fourth insulating film.

3. The semiconductor device according to claim 2,

wherein the fifth insulating film covers a side edge of the oxide semiconductor film.

4. The semiconductor device according to claim 1, further comprising:

a third insulating film covering the oxide semiconductor film, the second gate electrode, and the second gate insulating layer,

wherein the first insulating film and the third insulating film each comprise aluminum and oxygen.

5. The semiconductor device according to claim 1,

wherein the first semiconductor body is a semiconductor film.

6. A semiconductor device comprising:

a substrate;

a first transistor over the substrate, the first transistor comprising;

a first semiconductor body comprising silicon having crystallinity or germanium having crystallinity;

a first gate electrode overlapping the first semiconductor body;

a first gate insulating film between the first semiconductor body and the first gate electrode; and

a first source electrode and a first drain electrode electrically connected to the first semiconductor body;

a first insulating film over the first semiconductor body, the first gate electrode, and the first gate insulating film; and

a second transistor comprising;

a back gate electrode over the first insulating film;

an oxide semiconductor film over the back gate electrode;

a second gate electrode overlapping the oxide semiconductor film;

a second gate insulating layer between the oxide semiconductor film and the second gate electrode;

a second source electrode and a second drain electrode each in electric contact with the oxide semiconductor film; and

a side wall in direct contact with the second gate electrode,

wherein the oxide semiconductor film overlaps with the back gate electrode and the second gate electrode,

wherein the back gate electrode is in direct contact with the first insulating film, and

wherein the first insulating film comprises aluminum and oxygen.

7. The semiconductor device according to claim 6, further comprising:

a fourth insulating film comprising a projection, a top surface of the projection being in direct contact with a bottom surface of the oxide semiconductor film; and

a fifth insulating film on the fourth insulating film and around the projection,

wherein the back gate electrode is under the fourth insulating film.

8. The semiconductor device according to claim 7,

wherein the fifth insulating film covers a side edge of the oxide semiconductor film.

9. The semiconductor device according to claim 6, further comprising:

a third insulating film covering the oxide semiconductor film, the second gate electrode, and the second gate insulating layer,

wherein the first insulating film and the third insulating film each comprise aluminum and oxygen.

10. The semiconductor device according to claim 6,

wherein the first semiconductor body is a semiconductor film.

11. A semiconductor device comprising:

a substrate;

a first transistor over the substrate, the first transistor comprising;

a first semiconductor body comprising silicon having crystallinity or germanium having crystallinity;

a first gate electrode overlapping the first semiconductor body;

a first gate insulating film between the first semiconductor body and the first gate electrode; and

a first source electrode and a first drain electrode electrically connected to the first semiconductor body;

a first insulating film over the first semiconductor body, the first gate electrode, and the first gate insulating film;

a second transistor comprising;

an oxide semiconductor film over the first insulating film;

a second gate electrode overlapping the oxide semiconductor film;

a second gate insulating layer between the oxide semiconductor film and the second gate electrode;

a second source electrode and a second drain electrode each in electric contact with the oxide semiconductor film; and

a side wall in direct contact with the second gate electrode; and

a third insulating film on and in contact with the second gate electrode,

a fourth insulating film comprising a projection, a top surface of the projection being in direct contact with a bottom surface of the oxide semiconductor film; and

a fifth insulating film on the fourth insulating film and around the projection,

wherein the third insulating film comprises aluminum and oxygen.

12. The semiconductor device according to claim 11,

wherein the fifth insulating film covers a side edge of the oxide semiconductor film.

13. The semiconductor device according to claim 11,

wherein the first semiconductor body is a semiconductor film.