Metal-insulator-metal capacitor structure

• US 10,388,718 B2
• Filed: 09/09/2016
• Issued: 08/20/2019
• Est. Priority Date: 09/22/2015
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Basker, Veeraraghavan S., Cheng, Kangguo, Standaert, Theodorus E., Wang, Junli
• Primary Examiner(s): Hossain, Moazzam
• Assistant Examiner(s): Mojaddedi, Omar F
• Application Number:
  US15/260,688
• Publication Number:
  US 20170084684A1
• Time in Patent Office: 1,075 Days
• Field of Search: 257532
• CPC Class Codes: H01L 28/00 Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor testing or measuring during manufacture H01L22/00; integration methods H01L21/70; integrated circuits H01L27/00; two-terminal components with a potential-jump or surface barrier H01L29/00; resistors in general H01C; inductors in general H01F; capacitors in general H01G
• CPC Class Codes: H01L 28/60 Electrodes
• CPC Class Codes: H01L 28/87 made by depositing layers, e.g. by depositing alternating conductive and insulating layers
• CPC Class Codes: H01L 28/88 made by patterning layers, e.g. by etching conductive layers
• CPC Class Codes: H01L 28/91 made by depositing layers, e.g. by depositing alternating conductive and insulating layers
• CPC Class Codes: H01L 28/92 made by patterning layers, e.g. by etching conductive layers
• CPC Class Codes: H10B 43/27 the channels comprising vertical portions, e.g. U-shaped channels

Abstract

The disclosure is directed to semiconductor structures and, more particularly, to Metal-Insulator-Metal (MIM) capacitor structures and methods of manufacture. The method includes: forming at least one gate structure; removing material from the at least one gate structure to form a trench; depositing capacitor material within the trench and at an edge or outside of the trench; and forming a first contact in contact with a first conductive material of the capacitor material and a second contact in contact with a second conductive material of the capacitor material.

Claims

1. A method comprising:

forming a first gate structure having a first width dimension;

forming a second gate structure having a second width dimension, larger than the first width dimension;

removing material from the second gate structure to form a trench;

forming a capacitor structure within the trench and partly outside of the trench;

forming cap material of nitride material or a low-k dielectric material in the trench with a stepped configuration including a plurality of steps at each edge of the trench; and

forming insulator material inside the trench formed on the cap material,

wherein the forming the cap material includes forming a first step in the stepped configuration at each edge of the trench on an electrode plate within the trench and forming a second step and a third step in the stepped configuration at each edge of the trench on an electrode plate that extends outside of the trench,

wherein the forming of the capacitor structure comprises;

forming a first electrode plate on dielectric material within the trench;

forming a dielectric layer on the first electrode plate within the trench;

forming a second electrode plate on the dielectric layer within the trench and on insulator material formed outside of the trench;

forming a contact in direct electrical contact with the first electrode plate within the trench; and

forming contacts in direct electrical contact with the second electrode plate outside of the trench,

wherein the first electrode plate is the electrode plate within the trench and the second electrode plate is the electrode plate that extends outside of the trench.

2. The method of claim 1, wherein the second electrode plate is a top plate formed on a ledge formed by recessing insulator material outside of the trench.

8. The method of claim 2, wherein the first electrode plate is formed entirely within the trench.

9. The method of claim 8, wherein the contact in direct electrical contact with the first electrode plate is formed in a contact trench.

10. The method of claim 9, wherein the contact trench is formed in the insulator material inside the trench.

11. The method of claim 1, wherein the plurality of steps comprises three steps formed at each edge of the trench.

3. A method comprising:

forming a first gate structure having a first width dimension;

forming a second gate structure having a second width dimension, larger than the first width dimension;

removing material from the second gate structure to form a trench;

forming a capacitor structure within the trench and partly outside of the trench;

forming cap material of nitride material or a low-k dielectric material in the trench with a stepped configuration including a plurality of steps at each edge of the trench; and

forming insulator material inside the trench formed on the cap material,

wherein the forming the cap material includes forming a first step in the stepped configuration at each edge of the trench on an electrode plate within the trench and forming a second step and a third step in the stepped configuration at each edge of the trench on an electrode plate that extends outside of the trench,

wherein the forming of the capacitor structure comprises;

forming a first electrode plate on within the trench by deposition and patterning processes;

forming a dielectric layer on the first electrode plate within the trench by deposition and patterning processes;

forming a second electrode plate on the dielectric layer and on insulator material outside of the trench

forming a second dielectric layer on the second electrode plate; and

forming a third electrode plate on the second dielectric layer, wherein;

the first electrode plate is a bottom electrode plate formed within the trench;

the second electrode plate is the electrode plate that extends outside of the trench and is a center electrode plate formed within the trench and outside of the trench;

the third electrode plate is the electrode plate within the trench and is an upper electrode plate formed within the trench;

a first contact is formed in direct electrical contact with the upper electrode plate within the trench; and

a second contact is formed in direct electrical contact with the center electrode plate outside of the trench.

4. The method of claim 3, wherein the first electrode plate is formed on dielectric material within the trench by deposition and patterning processes.

5. The method of claim 4, wherein the dielectric material is a high-k dielectric material of the second gate structure.

7. The method of claim 3, wherein the first electrode plate is formed directly on a semiconductor substrate.

6. A method comprising:

forming a first gate structure having a first width dimension;

forming a second gate structure having a second width dimension, larger than the first width dimension;

removing material from the second gate structure to form a trench;

forming a capacitor structure within the trench and partly outside of the trench;

forming cap material of nitride material or a low-k dielectric material in the trench with a stepped configuration including a plurality of steps at each edge of the trench; and

forming insulator material inside the trench formed on the cap material,

wherein the forming the cap material includes forming a first step in the stepped configuration at each edge of the trench on an electrode plate within the trench and forming a second step and a third step in the stepped configuration at each edge of the trench on an electrode plate that extends outside of the trench,

wherein the forming of the capacitor structure comprises;

forming a first electrode plate within the trench by deposition and patterning processes;

forming a dielectric layer on the first electrode plate within the trench by deposition and patterning processes;

forming a second electrode plate on the dielectric layer and on insulator material outside of the trench;

forming a second dielectric layer on the second electrode plate; and

forming a third electrode plate on the second dielectric layer, wherein;

the first electrode plate is a bottom electrode plate formed within the trench;

the second electrode plate is the electrode plate that extends outside of the trench and is a center electrode plate formed within the trench and outside of the trench;

the third electrode plate is the electrode plate within the trench and is an upper electrode plate formed within the trench;

a first contact is formed in direct electrical contact with the upper electrode plate within the trench;

a second contact is formed in direct electrical contact with the center electrode plate outside of the trench; and

a third contact is formed in direct electrical contact with the bottom electrode plate outside of the trench.