Stacked nanosheets with self-aligned inner spacers and metallic source/drain
First Claim
Patent Images
1. A method for forming a semiconductor device, comprising:
- forming a stack of alternating channel layers and sacrificial layers;
recessing the sacrificial layers relative to the channel layers;
depositing a metal-doped insulator layer in contact with sidewalls of the channel layers;
annealing the metal-doped insulator layer to form a metallic layer at an interface between the metal-doped insulator layer and the channel layers;
etching back the metal-doped insulator layer to form inner spacers;
forming source/drain regions in contact with the metallic layer;
etching away the sacrificial layers; and
forming a gate stack on and around the channel layers.
1 Assignment
0 Petitions
Accused Products
Abstract
Semiconductor devices and methods of forming the same include forming a stack of alternating channel layers and sacrificial layers. The sacrificial layers are recessed relative to the channel layers. A metal-doped insulator layer is in contact with sidewalls of the channel layers. The metal-doped insulator layer is annealed to form a metallic layer at an interface between the metal-doped insulator layer and the channel layers. The metal-doped insulator layer is etched back to form inner spacers. Source/drain regions are formed in contact with the metallic layer. The sacrificial layers are etched away and a gate stack is formed on and around the channel layers.
-
Citations
15 Claims
-
1. A method for forming a semiconductor device, comprising:
-
forming a stack of alternating channel layers and sacrificial layers; recessing the sacrificial layers relative to the channel layers; depositing a metal-doped insulator layer in contact with sidewalls of the channel layers; annealing the metal-doped insulator layer to form a metallic layer at an interface between the metal-doped insulator layer and the channel layers; etching back the metal-doped insulator layer to form inner spacers; forming source/drain regions in contact with the metallic layer; etching away the sacrificial layers; and forming a gate stack on and around the channel layers. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. A method for forming a semiconductor device, comprising:
-
forming a stack of alternating channel layers and sacrificial layers; recessing the sacrificial layers relative to the channel layers; depositing a metal-doped insulator layer in contact with sidewalls of the channel layers; annealing the metal-doped insulator layer to form a metallic layer at an interface between the metal-doped insulator layer and the channel layers; etching away the metal-doped insulator layer; depositing a dielectric material after etching away the metal-doped insulator layer to form inner spacers; forming source/drain regions in contact with the metallic layer; etching away the sacrificial layers; and forming a gate stack on and around the channel layers. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15)
-
Specification