Flexible packaging architecture

• US 10,396,038 B2
• Filed: 09/26/2014
• Issued: 08/27/2019
• Est. Priority Date: 09/26/2014
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Cheah, Bok Eng, Kong, Jackson Chung Peng, Periaman, Shanggar, Skinner, Michael, Chew, Yen Hsiang, Mar, Kheng Tat, Abd Razak, Ridza Effendi, Ooi, Kooi Chi
• Primary Examiner(s): Trinh, Michael M
• Application Number:
  US15/505,901
• Publication Number:
  US 20170345763A1
• Time in Patent Office: 1,796 Days
• CPC Class Codes: H01L 21/4846 Leads on or in insulating or insulated substrates, e.g. metallisation H01L21/4821 takes precedence; metallisation of ceramics in general C04B41/51; printed circuits H05K3/00
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/16235 the bump connector connecting to a via metallisation of the item
• CPC Class Codes: H01L 2224/18 High density interconnect [HDI] connectors; Manufacturing methods related thereto
• CPC Class Codes: H01L 2224/24137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/73259 Bump and HDI connectors
• CPC Class Codes: H01L 23/3736 Metallic materials H01L23/3732, H01L23/3733, H01L23/3735, H01L23/3737, H01L23/3738 take precedence
• CPC Class Codes: H01L 23/49572 consisting of thin flexible metallic tape with or without a film carrier H01L23/49503 - H01L23/49568 and H01L23/49575 - H01L23/49579 take precedence
• CPC Class Codes: H01L 23/4985 Flexible insulating substrates H01L23/49572 and H01L23/49855 take precedence
• CPC Class Codes: H01L 23/5387 Flexible insulating substrates H01L23/5388 takes precedence
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/16 of an individual bump connector
• CPC Class Codes: H01L 24/18 High density interconnect [HDI] connectors; Manufacturing methods related thereto interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 24/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 25/0652 the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 25/0655 the devices being arranged next to each other
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA

Abstract

A flexible packaging architecture is described that is suitable for curved package shapes. In one example a package has a first die, a first mold compound layer over the first die, a wiring layer over the first mold compound layer, a second die over the wiring layer and electrically coupled to the wiring layer, and a second mold compound layer over the second die.

Claims

1. A package comprising:

a plurality of silicon dies embedded in a flexible substrate;

a flexible interposer layer over the embedded dies;

a thin film thermal distribution layer over the substrate opposite the flexible interposer layer, the flexible substrate being shaped with the dies and the interposer to a curved shape and cured so that the flexible substrate holds its shape; and

a second plurality of silicon dies embedded in a second flexible substrate, the second flexible substrate being in electrical contact with the flexible interposer opposite the flexible substrate.

2. The package of claim 1, wherein at least one die of the plurality of silicon dies is stacked over another die.

3. The package of claim 1, further comprising a through-silicon via to connect the stacked die to another die.

4. The package of claim 1, wherein the flexible interposer comprises an embedded redistribution metal layer to provide an electrical path to the flexible substrate.

5. The package of claim 4, wherein the flexible interposer comprises an elastomer to carry the embedded redistribution metal layer.

6. The package of claim 1, wherein the flexible interposer comprises a plurality of alternating metal and dielectric layers.

7. The package of claim 1, wherein the thin film thermal distribution layer comprises a copper-based composite.

8. The package of claim 1, wherein the plurality of silicon dies are electrically coupled and bonded to the flexible interposer.

9. The package of claim 8, wherein the silicon dies are electrically coupled and bonded to the flexible interposer by surface-activated bonding or thermal compression bonding.

10. The package of claim 1, further comprising a thin film thermal distribution layer over the second substrate opposite the flexible interposer.

11. An electronic computing system comprising:

a power supply;

a display; and

a semiconductor computing device package having a plurality of silicon dies embedded in a flexible substrate, a flexible interposer layer over the embedded dies, and a thin film thermal distribution layer over the substrate opposite the flexible interposer layer, the flexible substrate being shaped with the dies and the interposer to a curved shape and cured so that the flexible substrate holds its shape, and the semiconductor computing device package further comprising a second plurality of silicon dies embedded in a second flexible substrate, the second flexible substrate being in electrical contact with the flexible interposer opposite the flexible substrate.