Method of producing an optoelectronic component and optoelectronic component

• US 10,396,260 B2
• Filed: 05/13/2016
• Issued: 08/27/2019
• Est. Priority Date: 05/18/2015
• Status: Active Grant

• Current Assignee: OSRAM OLED GMBH (Ams-Osram AG)
• Original Assignee: Osram Opto Semiconductors GmbH (Ams-Osram AG)
• Inventors: Sabathil, Matthias, Moosburger, Jurgen, Singer, Frank
• Primary Examiner(s): Au, Bac H
• Application Number:
  US15/574,602
• Publication Number:
  US 20180151787A1
• Time in Patent Office: 1,201 Days
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 22/22 Connection or disconnection of sub-entities or redundant parts of a device in response to a measurement testing and repair of stores after manufacture including at wafer scale G11C29/00; fuses per se H01L23/525
• CPC Class Codes: H01L 2221/68359 used as a support during manufacture of interconnect decals or build up layers
• CPC Class Codes: H01L 25/0753 the devices being arranged next to each other
• CPC Class Codes: H01L 2933/005 relating to encapsulations
• CPC Class Codes: H01L 2933/0066 relating to arrangements for conducting electric current to or from the semiconductor body
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/54 having a particular shape
• CPC Class Codes: H01L 33/60 Reflective elements
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

A method of producing an optoelectronic component includes providing a wafer substrate that includes a light-emitting layer sequence, singulating the wafer substrate having the layer sequence into semiconductor components, applying the semiconductor components to an intermediate carrier, arranging a potting material on the intermediate carrier such that the potting material laterally surrounds the semiconductor components and is in direct contact, at least in places, with side surfaces of the semiconductor components, arranging one contact on one semiconductor component and the potting material, wherein one contact is arranged on a side of the semiconductor component and the potting material remote from the intermediate carrier, connecting the component to a carrier element, on a side of the semiconductor components remote from the intermediate carrier, removing the intermediate carrier and the wafer substrate of the semiconductor components, and bringing the semiconductor components into electrical contact by the contacts and the potting material.

Claims

1. A method of producing an optoelectronic component comprising:

providing a wafer substrate that includes a light-emitting layer sequence,

singulating the wafer substrate having the layer sequence into a plurality of semiconductor components,

applying the semiconductor components to an intermediate carrier,

arranging a potting material on the intermediate carrier such that the potting material laterally surrounds the semiconductor components and is in direct contact, at least in places, with side surfaces of the semiconductor components,

arranging in each case one contact on in each case one semiconductor component and the potting material, wherein in each case one contact is arranged on a side of the semiconductor component and of the potting material remote from the intermediate carrier,

connecting the component to a carrier element, on a side of the semiconductor components remote from the intermediate carrier,

removing the intermediate carrier and in each case the wafer substrate of the semiconductor components, and

bringing the semiconductor components into electrical contact by way of the contacts and the potting material, wherein a contact layer leads to the light-emitting layer sequence over an upper side of the potting material remote from the contacts.

2. The method according to claim 1, wherein the wafer substrate includes Si.

3. The method according to claim 1, wherein the intermediate carrier includes Cu, PeNi or Co.

4. The method according to claim 1, wherein a sacrificial layer is arranged laterally next to the semiconductor components on the intermediate carrier, at least in places, and the sacrificial layer is in direct contact, at least in places, with side surfaces of the semiconductor components and forms a concave surface between a side surface of the semiconductor component and the intermediate carrier.

5. The method according to claim 4, wherein the potting material is applied to the concavely curved surface of the sacrificial layer.

6. The method according to claim 4, wherein, when the intermediate carrier and the wafer substrate are removed, the sacrificial layer is also removed.

7. The method according to claim 6, wherein, after the intermediate carrier, the wafer substrate and the sacrificial layer have been removed, the potting material has a convex surface on a side remote from the carrier element.

8. The method according to claim 4, wherein, after the sacrificial layer has been removed, the contact layer leads over the convex surface of the potting material to the layer sequence.

9. The method according to claim 1, wherein the carrier element includes a plurality of layers.

10. The method according to claim 1, wherein the component connects to the carrier element by compression pressing.

11. The method according to claim 1, wherein a through-connection is formed in the potting material to electrically-contact a semiconductor component, and the contact layer leads through this through-connection to one of the contacts.

12. The method according to claim 1, wherein the semiconductor components connect in series.

13. The method according to claim 1, wherein functioning of the semiconductor components is tested, and in the event of a defect the contact layer of the defective semiconductor component is short-circuited.

14. The method according to claim 1, wherein the short-circuiting of the contact layer is performed by two through-connections through the potting material to different contacts.

15. The method according to claim 1, wherein the wafer substrate is ground before being provided on the intermediate carrier, to a height of at most 40 μ

m.

16. The method according to claim 1, wherein a mirror layer is provided between one of the semiconductor components and the assigned contact.

17. An optoelectronic component comprising:

a carrier element having contacts integrated therein,

a plurality of semiconductor components each including a light-emitting layer sequence, wherein in each case one semiconductor component is provided on in each case one contact of the carrier element,

a potting material provided on the carrier element that laterally surrounds the semiconductor components, is in direct contact, at least at in places, with side surfaces of the semiconductor components, and has a convex side remote from the carrier element,

a contact layer that leads, in each case over an upper side of the potting material remote from the carrier element, to one of the light-emitting layer sequences of the semiconductor components and makes electrical contact therewith, and

a through-connection that makes electrical contact with a semiconductor component through the potting material, as a result of which the contact layer electrically conductively connects to a further contact of the carrier element.

18. The optoelectronic component according to claim 17, wherein the light-emitting layer sequence contacts in a planar fashion the contact layer at its upper side remote from the carrier element such that there is no need to overcome differences in height between an upper side of the potting material and the layer sequence.