Successive approximation analog-to-digital converter

• US 10,396,813 B2
• Filed: 11/10/2016
• Issued: 08/27/2019
• Est. Priority Date: 11/13/2015
• Status: Active Grant

• Current Assignee: Societe Francaise de Detecteurs Infrarouges-Sofradir
• Original Assignee: Societe Francaise de Detecteurs Infrarouges-Sofradir
• Inventors: Decaens, Gilbert
• Primary Examiner(s): Nguyen, Linh V
• Application Number:
  US15/777,608
• Publication Number:
  US 20190181875A1
• Time in Patent Office: 1,020 Days
• Field of Search: 341155, 341156, 341161, 341172
• CPC Class Codes: H03M 1/162 the steps being performed sequentially in a single stage, i.e. recirculation type H03M1/161 takes precedence
• CPC Class Codes: H03M 1/168 and delivering the same number of bits

Abstract

The analog-to-digital converter includes a first stage in which a voltage to be converted is applied to the input of a first comparator. The first comparator delivers, on a first digital output, a first digital result representative of the comparison between the voltage to be converted and the comparison voltage. The first digital output is connected to a calculator of a first intermediate voltage. A second comparator compares the first intermediate voltage with the comparison voltage and delivers a second digital result on a second digital output terminal. The second digital output terminal is connected to a second calculator of residual voltage that is a function of the voltage to be converted, of first and second voltages and of the first and second digital results. The first calculator is formed by the second calculator.

Claims

1. Analog-to-digital converter comprising:

an input terminal receiving a voltage to be converted, the voltage to be converted being comprised in a conversion range bounded by a first voltage and a second voltage,

an amplifier having a first input terminal and an output terminal forming an analog output terminal of the converter,

a first switch connecting the input terminal of the amplifier and the output terminal of the amplifier,

first, second, third and fourth connections connected in parallel to the input terminal of the amplifier, each connection respectively comprising first, second, third and fourth capacitors having a first terminal connected to the first input terminal of the amplifier,

a second switch connecting a second terminal of the first capacitor to the output terminal of the amplifier,

a first comparator receiving the voltage to be converted and at least one first comparison voltage and configured to perform comparison between the voltage to be converted and the at least one first comparison voltage, and to deliver, on a first digital output, a first digital value on at least a first bit representative of said comparison,

a second comparator receiving a first intermediate voltage and at least a second comparison voltage and configured to perform comparison between the first intermediate voltage and the at least one second comparison voltage, and to deliver, on a second digital output, a second digital value on at least a second bit representative of said comparison,

a voltage source configured to;

apply the voltage to be converted on a second terminal of the first, second, third and fourth capacitors during a first period,

apply a first reference voltage on the second terminal of the second capacitor during a second and third periods, the first reference voltage being representative of the first digital value,

apply the first reference voltage on the second terminal of the third capacitor during the third period,

apply a second reference voltage on the second terminal of the fourth capacitor during the third period, the second reference voltage being representative of the second digital value,

a control circuit configured to calculate, by means of the amplifier and the second switch,

the first intermediate voltage from the voltage to be converted, from the first digital value and from said first voltage and second voltage,

a second intermediate voltage from the voltage to be converted, from the first and second digital values and from said first voltage and second voltage.

2. Converter according to claim 1, wherein the first comparator and the second comparator are formed by a single comparator and wherein a selector switch is configured to connect the input terminal of the comparator to the output terminal of the amplifier or to the input terminal receiving the voltage to be converted.

3. Converter according to claim 1, wherein the voltage source comprises a group of first switches connecting a generator of the voltage to be converted to the second terminals of the first, second, third and fourth capacitors, the group of first switches having a control electrode connected to a generator of a first signal.

4. Converter according to claim 1, wherein the voltage source comprises a group of second switches connecting a generator of the first reference voltage to the second terminal of the second capacitor, the group of second switches having a control electrode connected to a generator of a second signal.

5. Converter according to claim 1, wherein the voltage source comprises a group of third switches connecting a generator of the first reference voltage to the second terminal of the third capacitor and connecting a generator of the second reference voltage to the second terminal of the fourth capacitor, the group of third switches having a control electrode connected to a generator of a third signal.

6. Converter according to claim 1, wherein the value of the first reference voltage depends solely on the first digital value.

7. Converter according to claim 1, wherein the value of the second reference voltage depends solely on the second digital value.

8. Converter according to claim 1, wherein the second intermediate voltage is representative of

4Vin−

(Va+Vb)+Bi·

(Va−

Vb)+Bi·

(Vb−

Va)−

(Va+Vb)/2+B_i+1·

(Va−

Vb)/2+B_i+1·

(Vb−

Va)/2

with

Va;

the first voltage,

Vb;

the second voltage,

Vin;

the tension to be converted,

Bi;

the first digital value,

B_i+1;

the second digital value.

9. Converter according to claim 1, wherein the first comparator is formed by two comparators on one bit delivering a first digital value defined by first and second elementary bits.

10. Converter according to claim 9, wherein the second comparator is formed by two comparators on one bit delivering a second digital value defined by third and fourth elementary bits.

11. Converter according to claim 10, wherein the second intermediate voltage is representative of

4Vin−

2(Bi⁻

AND Bi⁺)·

Vref⁺−

2(Bi⁻

OR Bi⁺)·

(Va+Vb)/2−

2(Bi⁻

AND Bi⁺)·

Vref⁻

−

(B_i+1⁻

AND B_i+1⁺)·

Vref⁺−

(B_i+1⁻

OR B_i+1⁺)·

(Va+Vb)/2−

(B_i+1⁻

AND B_i+1⁺)·

Vref⁻

with

Va;

the first voltage,

Vb;

the second voltage,

Vin;

the tension to be converted,

Vref⁺, Vref⁻

;

first and second elementary comparison voltages,

Bi⁻

, Bi⁺;

the first and second elementary bits,

B_i+1⁻

, B_i+1⁺;

the third and fourth elementary bits.

12. Converter according to claim 1, further comprising first and second additional connections connected in parallel to the input terminal of the amplifier and respectively comprising first and second additional capacitors, a second terminal of the first additional capacitor being connected to the output of the amplifier by means of a switch of the group of the third switches, a second terminal of the second additional capacitor being connected to receive the first reference voltage via a switch of the group of the third switches.

13. Converter according to claim 1, wherein the first switch is configured to directly connect the input terminal of the amplifier and the output terminal of the amplifier.

14. Operating method of an analog-to-digital converter comprising:

providing an analog-to-digital converter comprising

an amplifier having a first input terminal and an output terminal forming an analog output terminal of the converter,

a first switch connecting the input terminal of the amplifier and the output terminal of the amplifier,

first, second, third and fourth connections connected in parallel to the input terminal of the amplifier, each connection respectively comprising first, second, third and fourth capacitors having a first terminal connected to the first input terminal of the amplifier,

sampling a voltage to be converted during a first period by applying said voltage to be converted to second terminals of the first, second, third and fourth capacitors, the voltage to be converted being comprised in a conversion range bounded by a first voltage and second voltage, the amplifier being connected as a follower by means of the first switch,

comparing the voltage to be converted with a first comparison voltage by means of a first comparator and delivering a first digital value on at least a first bit,

applying a first reference voltage on the second terminal of the second capacitor, during a second period, the first reference voltage being representative of the first digital value,

calculating a first intermediate voltage by means of the amplifier and the first and second capacitors, from the voltage to be converted and the first reference voltage,

comparing the first intermediate voltage with a second comparison voltage by means of a second comparator and delivering a second digital value on at least a second bit,

during a third period, applying the first reference voltage on the second electrode of the third capacitor and applying a second reference voltage on the second terminal of the fourth capacitor, the second reference voltage being representative of the second digital value,

calculating a second intermediate voltage by means of the amplifier and the first, second, third and fourth capacitors, from the voltage to be converted, the first reference voltage and the second reference voltage.